Commit ba18ec21 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Olof Johansson

ARM: clps711x: autcpu12: Move LCD DPOT definitions to board file

We do not have driver for Up/Down digital potentiometer (DPOT), so
just define pins as GPIOs and export these pins to user.
Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 2a6f0614
...@@ -51,12 +51,18 @@ ...@@ -51,12 +51,18 @@
#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000) #define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10) #define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
/* NAND flash */
#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO) #define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO)
#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */ #define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2) #define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2)
#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3) #define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3)
#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3) #define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3)
/* LCD contrast digital potentiometer */
#define AUTCPU12_DPOT_CS CLPS711X_GPIO(4, 0)
#define AUTCPU12_DPOT_CLK CLPS711X_GPIO(4, 1)
#define AUTCPU12_DPOT_UD CLPS711X_GPIO(4, 2)
static struct resource autcpu12_cs8900_resource[] __initdata = { static struct resource autcpu12_cs8900_resource[] __initdata = {
DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K), DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K),
DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ), DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
...@@ -148,6 +154,12 @@ static struct platform_device autcpu12_mmgpio_pdev __initdata = { ...@@ -148,6 +154,12 @@ static struct platform_device autcpu12_mmgpio_pdev __initdata = {
}, },
}; };
static const struct gpio autcpu12_gpios[] __initconst = {
{ AUTCPU12_DPOT_CS, GPIOF_OUT_INIT_HIGH, "DPOT CS" },
{ AUTCPU12_DPOT_CLK, GPIOF_OUT_INIT_LOW, "DPOT CLK" },
{ AUTCPU12_DPOT_UD, GPIOF_OUT_INIT_LOW, "DPOT UD" },
};
static void __init autcpu12_init(void) static void __init autcpu12_init(void)
{ {
clps711x_devices_init(); clps711x_devices_init();
...@@ -160,6 +172,8 @@ static void __init autcpu12_init(void) ...@@ -160,6 +172,8 @@ static void __init autcpu12_init(void)
static void __init autcpu12_init_late(void) static void __init autcpu12_init_late(void)
{ {
gpio_request_array(autcpu12_gpios, ARRAY_SIZE(autcpu12_gpios));
if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) { if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) {
/* We are need both drivers to handle NAND */ /* We are need both drivers to handle NAND */
platform_device_register(&autcpu12_nand_pdev); platform_device_register(&autcpu12_nand_pdev);
......
...@@ -48,12 +48,4 @@ ...@@ -48,12 +48,4 @@
#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ #define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
/*
* defines for lcd contrast
*/
#define AUTCPU12_DPOT_PORT_OFFSET PEDR
#define AUTCPU12_DPOT_CS (1<<0)
#define AUTCPU12_DPOT_CLK (1<<1)
#define AUTCPU12_DPOT_UD (1<<2)
#endif #endif
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