Commit ba47917c authored by Padmavathi Venna's avatar Padmavathi Venna Committed by Kukjin Kim

ARM: S3C64XX: Add SPI clkdev support

Registered the SPI bus clocks with clkdev using generic
connection id.
Signed-off-by: default avatarPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent a24d850b
...@@ -183,18 +183,6 @@ static struct clk init_clocks_off[] = { ...@@ -183,18 +183,6 @@ static struct clk init_clocks_off[] = {
.parent = &clk_p, .parent = &clk_p,
.enable = s3c64xx_pclk_ctrl, .enable = s3c64xx_pclk_ctrl,
.ctrlbit = S3C_CLKCON_PCLK_SPI1, .ctrlbit = S3C_CLKCON_PCLK_SPI1,
}, {
.name = "spi_48m",
.devname = "s3c64xx-spi.0",
.parent = &clk_48m,
.enable = s3c64xx_sclk_ctrl,
.ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
}, {
.name = "spi_48m",
.devname = "s3c64xx-spi.1",
.parent = &clk_48m,
.enable = s3c64xx_sclk_ctrl,
.ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
}, { }, {
.name = "48m", .name = "48m",
.devname = "s3c-sdhci.0", .devname = "s3c-sdhci.0",
...@@ -226,6 +214,22 @@ static struct clk init_clocks_off[] = { ...@@ -226,6 +214,22 @@ static struct clk init_clocks_off[] = {
}, },
}; };
static struct clk clk_48m_spi0 = {
.name = "spi_48m",
.devname = "s3c64xx-spi.0",
.parent = &clk_48m,
.enable = s3c64xx_sclk_ctrl,
.ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
};
static struct clk clk_48m_spi1 = {
.name = "spi_48m",
.devname = "s3c64xx-spi.1",
.parent = &clk_48m,
.enable = s3c64xx_sclk_ctrl,
.ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
};
static struct clk init_clocks[] = { static struct clk init_clocks[] = {
{ {
.name = "lcd", .name = "lcd",
...@@ -590,25 +594,6 @@ static struct clksrc_clk clksrcs[] = { ...@@ -590,25 +594,6 @@ static struct clksrc_clk clksrcs[] = {
.reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 }, .reg_src = { .reg = S3C_CLK_SRC, .shift = 5, .size = 2 },
.reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 }, .reg_div = { .reg = S3C_CLK_DIV1, .shift = 20, .size = 4 },
.sources = &clkset_uhost, .sources = &clkset_uhost,
}, {
.clk = {
.name = "spi-bus",
.devname = "s3c64xx-spi.0",
.ctrlbit = S3C_CLKCON_SCLK_SPI0,
.enable = s3c64xx_sclk_ctrl,
},
.reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
.sources = &clkset_spi_mmc,
}, {
.clk = {
.name = "spi-bus",
.devname = "s3c64xx-spi.1",
.enable = s3c64xx_sclk_ctrl,
},
.reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
.sources = &clkset_spi_mmc,
}, { }, {
.clk = { .clk = {
.name = "audio-bus", .name = "audio-bus",
...@@ -708,6 +693,30 @@ static struct clksrc_clk clk_sclk_mmc2 = { ...@@ -708,6 +693,30 @@ static struct clksrc_clk clk_sclk_mmc2 = {
.sources = &clkset_spi_mmc, .sources = &clkset_spi_mmc,
}; };
static struct clksrc_clk clk_sclk_spi0 = {
.clk = {
.name = "spi-bus",
.devname = "s3c64xx-spi.0",
.ctrlbit = S3C_CLKCON_SCLK_SPI0,
.enable = s3c64xx_sclk_ctrl,
},
.reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
.sources = &clkset_spi_mmc,
};
static struct clksrc_clk clk_sclk_spi1 = {
.clk = {
.name = "spi-bus",
.devname = "s3c64xx-spi.1",
.ctrlbit = S3C_CLKCON_SCLK_SPI1,
.enable = s3c64xx_sclk_ctrl,
},
.reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
.reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
.sources = &clkset_spi_mmc,
};
/* Clock initialisation code */ /* Clock initialisation code */
static struct clksrc_clk *init_parents[] = { static struct clksrc_clk *init_parents[] = {
...@@ -721,12 +730,16 @@ static struct clksrc_clk *clksrc_cdev[] = { ...@@ -721,12 +730,16 @@ static struct clksrc_clk *clksrc_cdev[] = {
&clk_sclk_mmc0, &clk_sclk_mmc0,
&clk_sclk_mmc1, &clk_sclk_mmc1,
&clk_sclk_mmc2, &clk_sclk_mmc2,
&clk_sclk_spi0,
&clk_sclk_spi1,
}; };
static struct clk *clk_cdev[] = { static struct clk *clk_cdev[] = {
&clk_hsmmc0, &clk_hsmmc0,
&clk_hsmmc1, &clk_hsmmc1,
&clk_hsmmc2, &clk_hsmmc2,
&clk_48m_spi0,
&clk_48m_spi1,
}; };
static struct clk_lookup s3c64xx_clk_lookup[] = { static struct clk_lookup s3c64xx_clk_lookup[] = {
...@@ -738,6 +751,11 @@ static struct clk_lookup s3c64xx_clk_lookup[] = { ...@@ -738,6 +751,11 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0),
CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1),
}; };
#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment