Commit bb4265ec authored by Sasha Neftin's avatar Sasha Neftin Committed by Jeff Kirsher

igc: Update the MAC reset flow

Use Device Reset flow instead of Port Reset flow.
This flow performs a reset of the entire controller device,
resulting in a state nearly approximating the state
following a power-up reset or internal PCIe reset,
except for system PCI configuration.
Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 6145787d
...@@ -40,7 +40,7 @@ static s32 igc_reset_hw_base(struct igc_hw *hw) ...@@ -40,7 +40,7 @@ static s32 igc_reset_hw_base(struct igc_hw *hw)
ctrl = rd32(IGC_CTRL); ctrl = rd32(IGC_CTRL);
hw_dbg("Issuing a global reset to MAC\n"); hw_dbg("Issuing a global reset to MAC\n");
wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); wr32(IGC_CTRL, ctrl | IGC_CTRL_DEV_RST);
ret_val = igc_get_auto_rd_done(hw); ret_val = igc_get_auto_rd_done(hw);
if (ret_val) { if (ret_val) {
......
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
#define IGC_ERR_SWFW_SYNC 13 #define IGC_ERR_SWFW_SYNC 13
/* Device Control */ /* Device Control */
#define IGC_CTRL_RST 0x04000000 /* Global reset */ #define IGC_CTRL_DEV_RST 0x20000000 /* Device reset */
#define IGC_CTRL_PHY_RST 0x80000000 /* PHY Reset */ #define IGC_CTRL_PHY_RST 0x80000000 /* PHY Reset */
#define IGC_CTRL_SLU 0x00000040 /* Set link up (Force Link) */ #define IGC_CTRL_SLU 0x00000040 /* Set link up (Force Link) */
......
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