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Commit bb4bc81a authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/home/rmk/linux-2.6-arm

parents adac1665 14e54cc3
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Showing with 465 additions and 424 deletions
arch/arm/configs/bast_defconfig
View file @ bb4bc81a
......@@ -14,8 +14,7 @@ CONFIG_GENERIC_IOMAP=y
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
#
......@@ -360,7 +359,6 @@ CONFIG_BLK_DEV_IDE_BAST=y
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
......@@ -781,7 +779,6 @@ CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
......
arch/arm/configs/collie_defconfig
View file @ bb4bc81a
......@@ -13,8 +13,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
......@@ -308,9 +307,7 @@ CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_OBSOLETE_CHIPS=y
# CONFIG_MTD_AMDSTD is not set
CONFIG_MTD_SHARP=y
# CONFIG_MTD_JEDEC is not set
#
# Mapping drivers for chip access
......@@ -396,7 +393,6 @@ CONFIG_ATA_OVER_ETH=m
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
......@@ -741,7 +737,6 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
......
arch/arm/configs/s3c2410_defconfig
View file @ bb4bc81a
......@@ -13,8 +13,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
......@@ -473,7 +472,6 @@ CONFIG_BLK_DEV_IDE_BAST=y
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
......@@ -896,7 +894,6 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
......
arch/arm/kernel/calls.S
View file @ bb4bc81a
This diff is collapsed.
arch/arm/kernel/entry-common.S
View file @ bb4bc81a
......@@ -87,7 +87,11 @@ ENTRY(ret_from_fork)
b ret_slow_syscall
.equ NR_syscalls,0
#define CALL(x) .equ NR_syscalls,NR_syscalls+1
#include "calls.S"
#undef CALL
#define CALL(x) .long x
/*=============================================================================
* SWI handler
......
arch/arm/mach-integrator/integrator_cp.c
View file @ bb4bc81a
......@@ -469,7 +469,9 @@ static void cp_clcd_enable(struct clcd_fb *fb)
if (fb->fb.var.bits_per_pixel <= 8)
val = CM_CTRL_LCDMUXSEL_VGA_8421BPP;
else if (fb->fb.var.bits_per_pixel <= 16)
val = CM_CTRL_LCDMUXSEL_VGA_16BPP;
val = CM_CTRL_LCDMUXSEL_VGA_16BPP
| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1
| CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
else
val = 0; /* no idea for this, don't trust the docs */
......
arch/arm/mach-s3c2410/cpu.h
View file @ bb4bc81a
......@@ -17,11 +17,12 @@
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT
* 14-Mar-2005 BJD Updated for __iomem
* 15-Jan-2006 LCVR Updated S3C2410_PA_##x to new S3C24XX_PA_##x macro
*/
/* todo - fix when rmk changes iodescs to use `void __iomem *` */
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#define MHZ (1000*1000)
......
arch/arm/mach-s3c2410/devs.c
View file @ bb4bc81a
......@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*
* Modifications:
* 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3
......@@ -46,8 +47,8 @@ struct platform_device *s3c24xx_uart_devs[3];
static struct resource s3c_usb_resource[] = {
[0] = {
.start = S3C2410_PA_USBHOST,
.end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.start = S3C24XX_PA_USBHOST,
.end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -76,8 +77,8 @@ EXPORT_SYMBOL(s3c_device_usb);
static struct resource s3c_lcd_resource[] = {
[0] = {
.start = S3C2410_PA_LCD,
.end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
.start = S3C24XX_PA_LCD,
.end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -139,8 +140,8 @@ EXPORT_SYMBOL(s3c_device_nand);
static struct resource s3c_usbgadget_resource[] = {
[0] = {
.start = S3C2410_PA_USBDEV,
.end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.start = S3C24XX_PA_USBDEV,
.end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -164,8 +165,8 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
static struct resource s3c_wdt_resource[] = {
[0] = {
.start = S3C2410_PA_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.start = S3C24XX_PA_WATCHDOG,
.end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -189,8 +190,8 @@ EXPORT_SYMBOL(s3c_device_wdt);
static struct resource s3c_i2c_resource[] = {
[0] = {
.start = S3C2410_PA_IIC,
.end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
.start = S3C24XX_PA_IIC,
.end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -214,8 +215,8 @@ EXPORT_SYMBOL(s3c_device_i2c);
static struct resource s3c_iis_resource[] = {
[0] = {
.start = S3C2410_PA_IIS,
.end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
.start = S3C24XX_PA_IIS,
.end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM,
}
};
......@@ -239,8 +240,8 @@ EXPORT_SYMBOL(s3c_device_iis);
static struct resource s3c_rtc_resource[] = {
[0] = {
.start = S3C2410_PA_RTC,
.end = S3C2410_PA_RTC + 0xff,
.start = S3C24XX_PA_RTC,
.end = S3C24XX_PA_RTC + 0xff,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -268,8 +269,8 @@ EXPORT_SYMBOL(s3c_device_rtc);
static struct resource s3c_adc_resource[] = {
[0] = {
.start = S3C2410_PA_ADC,
.end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
.start = S3C24XX_PA_ADC,
.end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -316,8 +317,8 @@ EXPORT_SYMBOL(s3c_device_sdi);
static struct resource s3c_spi0_resource[] = {
[0] = {
.start = S3C2410_PA_SPI,
.end = S3C2410_PA_SPI + 0x1f,
.start = S3C24XX_PA_SPI,
.end = S3C24XX_PA_SPI + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -341,8 +342,8 @@ EXPORT_SYMBOL(s3c_device_spi0);
static struct resource s3c_spi1_resource[] = {
[0] = {
.start = S3C2410_PA_SPI + 0x20,
.end = S3C2410_PA_SPI + 0x20 + 0x1f,
.start = S3C24XX_PA_SPI + 0x20,
.end = S3C24XX_PA_SPI + 0x20 + 0x1f,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -366,8 +367,8 @@ EXPORT_SYMBOL(s3c_device_spi1);
static struct resource s3c_timer0_resource[] = {
[0] = {
.start = S3C2410_PA_TIMER + 0x0C,
.end = S3C2410_PA_TIMER + 0x0C + 0xB,
.start = S3C24XX_PA_TIMER + 0x0C,
.end = S3C24XX_PA_TIMER + 0x0C + 0xB,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -391,8 +392,8 @@ EXPORT_SYMBOL(s3c_device_timer0);
static struct resource s3c_timer1_resource[] = {
[0] = {
.start = S3C2410_PA_TIMER + 0x18,
.end = S3C2410_PA_TIMER + 0x23,
.start = S3C24XX_PA_TIMER + 0x18,
.end = S3C24XX_PA_TIMER + 0x23,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -416,8 +417,8 @@ EXPORT_SYMBOL(s3c_device_timer1);
static struct resource s3c_timer2_resource[] = {
[0] = {
.start = S3C2410_PA_TIMER + 0x24,
.end = S3C2410_PA_TIMER + 0x2F,
.start = S3C24XX_PA_TIMER + 0x24,
.end = S3C24XX_PA_TIMER + 0x2F,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -441,8 +442,8 @@ EXPORT_SYMBOL(s3c_device_timer2);
static struct resource s3c_timer3_resource[] = {
[0] = {
.start = S3C2410_PA_TIMER + 0x30,
.end = S3C2410_PA_TIMER + 0x3B,
.start = S3C24XX_PA_TIMER + 0x30,
.end = S3C24XX_PA_TIMER + 0x3B,
.flags = IORESOURCE_MEM,
},
[1] = {
......
arch/arm/mach-s3c2410/dma.c
View file @ bb4bc81a
......@@ -1152,7 +1152,7 @@ static int __init s3c2410_init_dma(void)
printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
dma_base = ioremap(S3C2410_PA_DMA, 0x200);
dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
if (dma_base == NULL) {
printk(KERN_ERR "dma failed to remap register block\n");
return -ENOMEM;
......
arch/arm/mach-s3c2410/sleep.S
View file @ bb4bc81a
......@@ -133,12 +133,12 @@ ENTRY(s3c2410_cpu_resume)
@@ load UART to allow us to print the two characters for
@@ resume debug
mov r2, #S3C2410_PA_UART & 0xff000000
orr r2, r2, #S3C2410_PA_UART & 0xff000
mov r2, #S3C24XX_PA_UART & 0xff000000
orr r2, r2, #S3C24XX_PA_UART & 0xff000
#if 0
/* SMDK2440 LED set */
mov r14, #S3C2410_PA_GPIO
mov r14, #S3C24XX_PA_GPIO
ldr r12, [ r14, #0x54 ]
bic r12, r12, #3<<4
orr r12, r12, #1<<7
......
arch/arm/mm/ioremap.c
View file @ bb4bc81a
......@@ -142,7 +142,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
return NULL;
addr = (unsigned long)area->addr;
if (remap_area_pages(addr, pfn, size, flags)) {
vfree(addr);
vfree((void *)addr);
return NULL;
}
return (void __iomem *) (offset + (char *)addr);
......
arch/arm/mm/mm-armv.c
View file @ bb4bc81a
......@@ -343,6 +343,12 @@ static struct mem_types mem_types[] __initdata = {
PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
PMD_SECT_TEX(1),
.domain = DOMAIN_IO,
},
[MT_NONSHARED_DEVICE] = {
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV |
PMD_SECT_AP_WRITE,
.domain = DOMAIN_IO,
}
};
......
drivers/input/touchscreen/ads7846.c
View file @ bb4bc81a
......@@ -29,9 +29,6 @@
#ifdef CONFIG_ARCH_OMAP
#include <asm/arch/gpio.h>
#endif
#else
#define set_irq_type(irq,type) do{}while(0)
#endif
......@@ -509,14 +506,14 @@ static int __devinit ads7846_probe(struct spi_device *spi)
ts->msg.complete = ads7846_rx;
ts->msg.context = ts;
if (request_irq(spi->irq, ads7846_irq, SA_SAMPLE_RANDOM,
spi->dev.bus_id, ts)) {
if (request_irq(spi->irq, ads7846_irq,
SA_SAMPLE_RANDOM | SA_TRIGGER_FALLING,
spi->dev.bus_id, ts)) {
dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
input_unregister_device(&ts->input);
kfree(ts);
return -EBUSY;
}
set_irq_type(spi->irq, IRQT_FALLING);
dev_info(&spi->dev, "touchscreen, irq %d\n", spi->irq);
......
drivers/serial/imx.c
View file @ bb4bc81a
......@@ -402,10 +402,10 @@ static int imx_startup(struct uart_port *port)
DRIVER_NAME, sport);
if (retval) goto error_out2;
retval = request_irq(sport->rtsirq, imx_rtsint, 0,
retval = request_irq(sport->rtsirq, imx_rtsint,
SA_TRIGGER_FALLING | SA_TRIGGER_RISING,
DRIVER_NAME, sport);
if (retval) goto error_out3;
set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
/*
* Finally, clear and enable interrupts
......
drivers/serial/s3c2410.c
View file @ bb4bc81a
......@@ -1060,7 +1060,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
port->mapbase = res->start;
port->membase = S3C24XX_VA_UART + (res->start - S3C2410_PA_UART);
port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
port->irq = platform_get_irq(platdev, 0);
ourport->clk = clk_get(&platdev->dev, "uart");
......
drivers/video/amba-clcd.c
View file @ bb4bc81a
......@@ -116,9 +116,10 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
int ret = 0;
memset(&var->transp, 0, sizeof(var->transp));
memset(&var->red, 0, sizeof(var->red));
memset(&var->green, 0, sizeof(var->green));
memset(&var->blue, 0, sizeof(var->blue));
var->red.msb_right = 0;
var->green.msb_right = 0;
var->blue.msb_right = 0;
switch (var->bits_per_pixel) {
case 1:
......@@ -133,34 +134,20 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
var->blue.offset = 0;
break;
case 16:
var->red.length = 5;
var->green.length = 6;
var->blue.length = 5;
if (fb->panel->cntl & CNTL_BGR) {
var->red.offset = 11;
var->green.offset = 5;
var->blue.offset = 0;
} else {
var->red.offset = 0;
var->green.offset = 5;
var->blue.offset = 11;
}
var->red.length = 5;
var->blue.length = 5;
/*
* Green length can be 5 or 6 depending whether
* we're operating in RGB555 or RGB565 mode.
*/
if (var->green.length != 5 && var->green.length != 6)
var->green.length = 6;
break;
case 32:
if (fb->panel->cntl & CNTL_LCDTFT) {
var->red.length = 8;
var->green.length = 8;
var->blue.length = 8;
if (fb->panel->cntl & CNTL_BGR) {
var->red.offset = 16;
var->green.offset = 8;
var->blue.offset = 0;
} else {
var->red.offset = 0;
var->green.offset = 8;
var->blue.offset = 16;
}
break;
}
default:
......@@ -168,6 +155,23 @@ clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
break;
}
/*
* >= 16bpp displays have separate colour component bitfields
* encoded in the pixel data. Calculate their position from
* the bitfield length defined above.
*/
if (ret == 0 && var->bits_per_pixel >= 16) {
if (fb->panel->cntl & CNTL_BGR) {
var->blue.offset = 0;
var->green.offset = var->blue.offset + var->blue.length;
var->red.offset = var->green.offset + var->green.length;
} else {
var->red.offset = 0;
var->green.offset = var->red.offset + var->red.length;
var->blue.offset = var->green.offset + var->green.length;
}
}
return ret;
}
......
include/asm-arm/arch-s3c2410/debug-macro.S
View file @ bb4bc81a
......@@ -25,7 +25,7 @@
.macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1
ldreq \rx, = S3C2410_PA_UART
ldreq \rx, = S3C24XX_PA_UART
ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C2410_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
......@@ -44,7 +44,7 @@
1003:
mrc p15, 0, \rd, c1, c0
tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
......@@ -75,7 +75,7 @@
1003:
mrc p15, 0, \rd, c1, c0
tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
......
include/asm-arm/arch-s3c2410/map.h
View file @ bb4bc81a
......@@ -14,6 +14,7 @@
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
* 15-Jan-2006 LCVR Added S3C24XX_PA macros for common S3C24XX resources
*/
#ifndef __ASM_ARCH_MAP_H
......@@ -188,5 +189,42 @@
#define S3C2400_SDRAM_PA (S3C2400_CS6)
/* Use a single interface for common resources between S3C24XX cpus */
#ifdef CONFIG_CPU_S3C2400
#define S3C24XX_PA_IRQ S3C2400_PA_IRQ
#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL
#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST
#define S3C24XX_PA_DMA S3C2400_PA_DMA
#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR
#define S3C24XX_PA_LCD S3C2400_PA_LCD
#define S3C24XX_PA_UART S3C2400_PA_UART
#define S3C24XX_PA_TIMER S3C2400_PA_TIMER
#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV
#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG
#define S3C24XX_PA_IIC S3C2400_PA_IIC
#define S3C24XX_PA_IIS S3C2400_PA_IIS
#define S3C24XX_PA_GPIO S3C2400_PA_GPIO
#define S3C24XX_PA_RTC S3C2400_PA_RTC
#define S3C24XX_PA_ADC S3C2400_PA_ADC
#define S3C24XX_PA_SPI S3C2400_PA_SPI
#else
#define S3C24XX_PA_IRQ S3C2410_PA_IRQ
#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL
#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST
#define S3C24XX_PA_DMA S3C2410_PA_DMA
#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
#define S3C24XX_PA_LCD S3C2410_PA_LCD
#define S3C24XX_PA_UART S3C2410_PA_UART
#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
#define S3C24XX_PA_IIC S3C2410_PA_IIC
#define S3C24XX_PA_IIS S3C2410_PA_IIS
#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
#define S3C24XX_PA_RTC S3C2410_PA_RTC
#define S3C24XX_PA_ADC S3C2410_PA_ADC
#define S3C24XX_PA_SPI S3C2410_PA_SPI
#endif
#endif /* __ASM_ARCH_MAP_H */
include/asm-arm/arch-s3c2410/regs-serial.h
View file @ bb4bc81a
......@@ -39,9 +39,9 @@
#define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 )
#define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 )
#define S3C2410_PA_UART0 (S3C2410_PA_UART)
#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 )
#define S3C2410_PA_UART2 (S3C2410_PA_UART + 0x8000 )
#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
#define S3C2410_URXH (0x24)
#define S3C2410_UTXH (0x20)
......
include/asm-arm/arch-s3c2410/uncompress.h
View file @ bb4bc81a
......@@ -35,13 +35,13 @@
#undef S3C2410_GPIOREG
#undef S3C2410_WDOGREG
#define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x)))
#define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x)))
#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x)))
#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
#define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
static __inline__ void
uart_wr(unsigned int reg, unsigned int val)
......
include/asm-arm/mach/map.h
View file @ bb4bc81a
......@@ -26,6 +26,7 @@ struct meminfo;
#define MT_MEMORY 5
#define MT_ROM 6
#define MT_IXP2000_DEVICE 7
#define MT_NONSHARED_DEVICE 8
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
......
include/asm-arm/pgtable.h
View file @ bb4bc81a
......@@ -168,6 +168,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))
/*
* - coarse table (not used)
......
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