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nexedi
linux
Commits
bd4efa73
Commit
bd4efa73
authored
Apr 02, 2003
by
David S. Miller
Browse files
Options
Browse Files
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Plain Diff
Merge nuts.ninka.net:/home/davem/src/BK/sparcwork-2.5
into nuts.ninka.net:/home/davem/src/BK/sparc-2.5
parents
513230c4
8b4d8f66
Changes
23
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
23 changed files
with
195 additions
and
169 deletions
+195
-169
arch/sparc64/boot/Makefile
arch/sparc64/boot/Makefile
+3
-3
arch/sparc64/defconfig
arch/sparc64/defconfig
+4
-1
arch/sparc64/kernel/entry.S
arch/sparc64/kernel/entry.S
+56
-56
arch/sparc64/kernel/etrap.S
arch/sparc64/kernel/etrap.S
+45
-45
arch/sparc64/kernel/head.S
arch/sparc64/kernel/head.S
+1
-1
arch/sparc64/kernel/itlb_base.S
arch/sparc64/kernel/itlb_base.S
+1
-1
arch/sparc64/kernel/module.c
arch/sparc64/kernel/module.c
+7
-0
arch/sparc64/kernel/process.c
arch/sparc64/kernel/process.c
+11
-10
arch/sparc64/kernel/rtrap.S
arch/sparc64/kernel/rtrap.S
+3
-3
arch/sparc64/kernel/signal32.c
arch/sparc64/kernel/signal32.c
+1
-1
arch/sparc64/kernel/trampoline.S
arch/sparc64/kernel/trampoline.S
+1
-1
arch/sparc64/kernel/us2e_cpufreq.c
arch/sparc64/kernel/us2e_cpufreq.c
+2
-1
arch/sparc64/kernel/winfixup.S
arch/sparc64/kernel/winfixup.S
+6
-6
arch/sparc64/mm/ultra.S
arch/sparc64/mm/ultra.S
+1
-1
arch/sparc64/solaris/entry64.S
arch/sparc64/solaris/entry64.S
+21
-21
include/asm-sparc64/head.h
include/asm-sparc64/head.h
+1
-1
include/asm-sparc64/processor.h
include/asm-sparc64/processor.h
+2
-2
include/asm-sparc64/ptrace.h
include/asm-sparc64/ptrace.h
+0
-4
include/asm-sparc64/ttable.h
include/asm-sparc64/ttable.h
+11
-11
include/linux/elf.h
include/linux/elf.h
+5
-0
kernel/module.c
kernel/module.c
+5
-0
scripts/modpost.c
scripts/modpost.c
+6
-0
scripts/modpost.h
scripts/modpost.h
+2
-0
No files found.
arch/sparc64/boot/Makefile
View file @
bd4efa73
...
@@ -19,16 +19,16 @@ quiet_cmd_strip = STRIP $@
...
@@ -19,16 +19,16 @@ quiet_cmd_strip = STRIP $@
# Actual linking
# Actual linking
$(obj)/image
:
FORCE
$(obj)/image
:
vmlinux
FORCE
$(
call
if_changed,strip
)
$(
call
if_changed,strip
)
@
echo
' kernel: $@ is ready'
@
echo
' kernel: $@ is ready'
$(obj)/tftpboot.img
:
$(obj)/piggyback System.map $(ROOT_IMG) FORCE
$(obj)/tftpboot.img
:
vmlinux
$(obj)/piggyback System.map $(ROOT_IMG) FORCE
$(
call
if_changed,elftoaout
)
$(
call
if_changed,elftoaout
)
$(
call
if_changed,piggy
)
$(
call
if_changed,piggy
)
@
echo
' kernel: $@ is ready'
@
echo
' kernel: $@ is ready'
$(obj)/vmlinux.aout
:
FORCE
$(obj)/vmlinux.aout
:
vmlinux
FORCE
$(
call
if_changed,elftoaout
)
$(
call
if_changed,elftoaout
)
@
echo
' kernel: $@ is ready'
@
echo
' kernel: $@ is ready'
arch/sparc64/defconfig
View file @
bd4efa73
...
@@ -348,7 +348,6 @@ CONFIG_PACKET=y
...
@@ -348,7 +348,6 @@ CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_UNIX=y
CONFIG_NET_KEY=m
CONFIG_NET_KEY=m
CONFIG_INET=y
CONFIG_INET=y
...
@@ -512,6 +511,7 @@ CONFIG_HIPPI=y
...
@@ -512,6 +511,7 @@ CONFIG_HIPPI=y
CONFIG_PLIP=m
CONFIG_PLIP=m
CONFIG_PPP=m
CONFIG_PPP=m
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_MULTILINK is not set
CONFIG_PPP_FILTER=y
# CONFIG_PPP_ASYNC is not set
# CONFIG_PPP_ASYNC is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_DEFLATE is not set
# CONFIG_PPP_DEFLATE is not set
...
@@ -1058,9 +1058,12 @@ CONFIG_CRYPTO_BLOWFISH=m
...
@@ -1058,9 +1058,12 @@ CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_DEFLATE=m
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_TEST is not set
#
#
# Library routines
# Library routines
#
#
CONFIG_CRC32=y
CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
arch/sparc64/kernel/entry.S
View file @
bd4efa73
This diff is collapsed.
Click to expand it.
arch/sparc64/kernel/etrap.S
View file @
bd4efa73
...
@@ -15,7 +15,7 @@
...
@@ -15,7 +15,7 @@
#include <asm/head.h>
#include <asm/head.h>
#include <asm/processor.h>
#include <asm/processor.h>
#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-
REGWIN
_SZ)
#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-
STACKFRAME
_SZ)
#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
#define ETRAP_PSTATE2 (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
#define ETRAP_PSTATE2 (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
...
@@ -33,8 +33,8 @@ etrap_irq:
...
@@ -33,8 +33,8 @@ etrap_irq:
sllx
%
g2
,
20
,
%
g3
!
IEU0
Group
sllx
%
g2
,
20
,
%
g3
!
IEU0
Group
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU1
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU1
or
%
g1
,
%
g3
,
%
g1
!
IEU0
Group
or
%
g1
,
%
g3
,
%
g1
!
IEU0
Group
bne
,
pn
%
xcc
,
1
f
!
CTI
bne
,
pn
%
xcc
,
1
f
!
CTI
sub
%
sp
,
REGWIN
_SZ
+
TRACEREG_SZ
-
STACK_BIAS
,
%
g2
!
IEU1
sub
%
sp
,
STACKFRAME
_SZ
+
TRACEREG_SZ
-
STACK_BIAS
,
%
g2
!
IEU1
wrpr
%
g0
,
7
,
%
cleanwin
!
Single
Group
+
4
bubbles
wrpr
%
g0
,
7
,
%
cleanwin
!
Single
Group
+
4
bubbles
sethi
%
hi
(
TASK_REGOFF
),
%
g2
!
IEU0
Group
sethi
%
hi
(
TASK_REGOFF
),
%
g2
!
IEU0
Group
...
@@ -46,12 +46,12 @@ etrap_irq:
...
@@ -46,12 +46,12 @@ etrap_irq:
wr
%
g0
,
0
,
%
fprs
!
Single
Group
+
4
bubbles
wr
%
g0
,
0
,
%
fprs
!
Single
Group
+
4
bubbles
1
:
rdpr
%
tpc
,
%
g3
!
Single
Group
1
:
rdpr
%
tpc
,
%
g3
!
Single
Group
stx
%
g1
,
[%
g2
+
REGWIN_SZ
+
PT_V9_TSTATE
]
!
Store
Group
stx
%
g1
,
[%
g2
+
STACKFRAME_SZ
+
PT_V9_TSTATE
]
!
Store
Group
rdpr
%
tnpc
,
%
g1
!
Single
Group
rdpr
%
tnpc
,
%
g1
!
Single
Group
stx
%
g3
,
[%
g2
+
REGWIN
_SZ
+
PT_V9_TPC
]
!
Store
Group
stx
%
g3
,
[%
g2
+
STACKFRAME
_SZ
+
PT_V9_TPC
]
!
Store
Group
rd
%
y
,
%
g3
!
Single
Group
+
4
bubbles
rd
%
y
,
%
g3
!
Single
Group
+
4
bubbles
stx
%
g1
,
[%
g2
+
REGWIN
_SZ
+
PT_V9_TNPC
]
!
Store
Group
stx
%
g1
,
[%
g2
+
STACKFRAME
_SZ
+
PT_V9_TNPC
]
!
Store
Group
st
%
g3
,
[%
g2
+
REGWIN
_SZ
+
PT_V9_Y
]
!
Store
Group
st
%
g3
,
[%
g2
+
STACKFRAME
_SZ
+
PT_V9_Y
]
!
Store
Group
save
%
g2
,
-
STACK_BIAS
,
%
sp
!
Ordering
here
is
critical
!
Single
Group
save
%
g2
,
-
STACK_BIAS
,
%
sp
!
Ordering
here
is
critical
!
Single
Group
mov
%
g6
,
%
l6
!
IEU0
Group
mov
%
g6
,
%
l6
!
IEU0
Group
...
@@ -75,23 +75,23 @@ etrap_irq:
...
@@ -75,23 +75,23 @@ etrap_irq:
mov
%
g7
,
%
l2
!
IEU1
mov
%
g7
,
%
l2
!
IEU1
wrpr
%
g0
,
ETRAP_PSTATE1
,
%
pstate
!
Single
Group
+
4
bubbles
wrpr
%
g0
,
ETRAP_PSTATE1
,
%
pstate
!
Single
Group
+
4
bubbles
stx
%
g1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G1
]
!
Store
Group
stx
%
g1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G1
]
!
Store
Group
stx
%
g2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G2
]
!
Store
Group
stx
%
g2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G2
]
!
Store
Group
stx
%
g3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G3
]
!
Store
Group
stx
%
g3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G3
]
!
Store
Group
stx
%
g4
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G4
]
!
Store
Group
stx
%
g4
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G4
]
!
Store
Group
stx
%
g5
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G5
]
!
Store
Group
stx
%
g5
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G5
]
!
Store
Group
stx
%
g6
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G6
]
!
Store
Group
stx
%
g6
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G6
]
!
Store
Group
stx
%
g7
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G7
]
!
Store
Group
stx
%
g7
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G7
]
!
Store
Group
stx
%
i0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I0
]
!
Store
Group
stx
%
i0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I0
]
!
Store
Group
stx
%
i1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I1
]
!
Store
Group
stx
%
i1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I1
]
!
Store
Group
stx
%
i2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I2
]
!
Store
Group
stx
%
i2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I2
]
!
Store
Group
stx
%
i3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I3
]
!
Store
Group
stx
%
i3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I3
]
!
Store
Group
stx
%
i4
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I4
]
!
Store
Group
stx
%
i4
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I4
]
!
Store
Group
stx
%
i5
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I5
]
!
Store
Group
stx
%
i5
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I5
]
!
Store
Group
stx
%
i6
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I6
]
!
Store
Group
stx
%
i6
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I6
]
!
Store
Group
stx
%
i7
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I7
]
!
Store
Group
stx
%
i7
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I7
]
!
Store
Group
wrpr
%
g0
,
ETRAP_PSTATE2
,
%
pstate
!
Single
Group
+
4
bubbles
wrpr
%
g0
,
ETRAP_PSTATE2
,
%
pstate
!
Single
Group
+
4
bubbles
mov
%
l6
,
%
g6
!
IEU0
mov
%
l6
,
%
g6
!
IEU0
jmpl
%
l2
+
0x4
,
%
g0
!
CTI
Group
jmpl
%
l2
+
0x4
,
%
g0
!
CTI
Group
...
@@ -167,7 +167,7 @@ etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
...
@@ -167,7 +167,7 @@ etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
stx
%
g1
,
[%
g2
+
STACK_BIAS
+
0x80
]
stx
%
g1
,
[%
g2
+
STACK_BIAS
+
0x80
]
rdpr
%
tstate
,
%
g1
!
Single
Group
+
4
bubbles
rdpr
%
tstate
,
%
g1
!
Single
Group
+
4
bubbles
sub
%
g2
,
REGWIN_SZ
+
TRACEREG_SZ
-
STACK_BIAS
,
%
g2
!
IEU1
sub
%
g2
,
STACKFRAME_SZ
+
TRACEREG_SZ
-
STACK_BIAS
,
%
g2
!
IEU1
ba
,
pt
%
xcc
,
1
b
!
CTI
Group
ba
,
pt
%
xcc
,
1
b
!
CTI
Group
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU0
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU0
...
@@ -179,7 +179,7 @@ scetrap: rdpr %pil, %g2 ! Single Group
...
@@ -179,7 +179,7 @@ scetrap: rdpr %pil, %g2 ! Single Group
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU1
andcc
%
g1
,
TSTATE_PRIV
,
%
g0
!
IEU1
or
%
g1
,
%
g3
,
%
g1
!
IEU0
Group
or
%
g1
,
%
g3
,
%
g1
!
IEU0
Group
bne
,
pn
%
xcc
,
1
f
!
CTI
bne
,
pn
%
xcc
,
1
f
!
CTI
sub
%
sp
,
(
REGWIN_SZ
+
TRACEREG_SZ
-
STACK_BIAS
),
%
g2
!
IEU1
sub
%
sp
,
(
STACKFRAME_SZ
+
TRACEREG_SZ
-
STACK_BIAS
),
%
g2
!
IEU1
wrpr
%
g0
,
7
,
%
cleanwin
!
Single
Group
+
4
bubbles
wrpr
%
g0
,
7
,
%
cleanwin
!
Single
Group
+
4
bubbles
sllx
%
g1
,
51
,
%
g3
!
IEU0
Group
sllx
%
g1
,
51
,
%
g3
!
IEU0
Group
...
@@ -189,11 +189,11 @@ scetrap: rdpr %pil, %g2 ! Single Group
...
@@ -189,11 +189,11 @@ scetrap: rdpr %pil, %g2 ! Single Group
add
%
g6
,
%
g2
,
%
g2
!
IEU0
Group
add
%
g6
,
%
g2
,
%
g2
!
IEU0
Group
wr
%
g0
,
0
,
%
fprs
!
Single
Group
+
4
bubbles
wr
%
g0
,
0
,
%
fprs
!
Single
Group
+
4
bubbles
1
:
rdpr
%
tpc
,
%
g3
!
Single
Group
1
:
rdpr
%
tpc
,
%
g3
!
Single
Group
stx
%
g1
,
[%
g2
+
REGWIN_SZ
+
PT_V9_TSTATE
]
!
Store
Group
stx
%
g1
,
[%
g2
+
STACKFRAME_SZ
+
PT_V9_TSTATE
]
!
Store
Group
rdpr
%
tnpc
,
%
g1
!
Single
Group
rdpr
%
tnpc
,
%
g1
!
Single
Group
stx
%
g3
,
[%
g2
+
REGWIN
_SZ
+
PT_V9_TPC
]
!
Store
Group
stx
%
g3
,
[%
g2
+
STACKFRAME
_SZ
+
PT_V9_TPC
]
!
Store
Group
stx
%
g1
,
[%
g2
+
REGWIN
_SZ
+
PT_V9_TNPC
]
!
Store
Group
stx
%
g1
,
[%
g2
+
STACKFRAME
_SZ
+
PT_V9_TNPC
]
!
Store
Group
save
%
g2
,
-
STACK_BIAS
,
%
sp
!
Ordering
here
is
critical
!
Single
Group
save
%
g2
,
-
STACK_BIAS
,
%
sp
!
Ordering
here
is
critical
!
Single
Group
mov
%
g6
,
%
l6
!
IEU0
Group
mov
%
g6
,
%
l6
!
IEU0
Group
bne
,
pn
%
xcc
,
2
f
!
CTI
bne
,
pn
%
xcc
,
2
f
!
CTI
...
@@ -214,32 +214,32 @@ scetrap: rdpr %pil, %g2 ! Single Group
...
@@ -214,32 +214,32 @@ scetrap: rdpr %pil, %g2 ! Single Group
mov
%
g5
,
%
l5
!
IEU0
Group
mov
%
g5
,
%
l5
!
IEU0
Group
add
%
g7
,
0x4
,
%
l2
!
IEU1
add
%
g7
,
0x4
,
%
l2
!
IEU1
wrpr
%
g0
,
ETRAP_PSTATE1
,
%
pstate
!
Single
Group
+
4
bubbles
wrpr
%
g0
,
ETRAP_PSTATE1
,
%
pstate
!
Single
Group
+
4
bubbles
stx
%
g1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G1
]
!
Store
Group
stx
%
g1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G1
]
!
Store
Group
stx
%
g2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G2
]
!
Store
Group
stx
%
g2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G2
]
!
Store
Group
sllx
%
l7
,
24
,
%
l7
!
IEU0
sllx
%
l7
,
24
,
%
l7
!
IEU0
stx
%
g3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G3
]
!
Store
Group
stx
%
g3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G3
]
!
Store
Group
rdpr
%
cwp
,
%
l0
!
Single
Group
rdpr
%
cwp
,
%
l0
!
Single
Group
stx
%
g4
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G4
]
!
Store
Group
stx
%
g4
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G4
]
!
Store
Group
stx
%
g5
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G5
]
!
Store
Group
stx
%
g5
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G5
]
!
Store
Group
stx
%
g6
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G6
]
!
Store
Group
stx
%
g6
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G6
]
!
Store
Group
stx
%
g7
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_G7
]
!
Store
Group
stx
%
g7
,
[%
sp
+
PTREGS_OFF
+
PT_V9_G7
]
!
Store
Group
or
%
l7
,
%
l0
,
%
l7
!
IEU0
or
%
l7
,
%
l0
,
%
l7
!
IEU0
sethi
%
hi
(
TSTATE_RMO
|
TSTATE_PEF
),
%
l0
!
IEU1
sethi
%
hi
(
TSTATE_RMO
|
TSTATE_PEF
),
%
l0
!
IEU1
or
%
l7
,
%
l0
,
%
l7
!
IEU0
Group
or
%
l7
,
%
l0
,
%
l7
!
IEU0
Group
wrpr
%
l2
,
%
tnpc
!
Single
Group
+
4
bubbles
wrpr
%
l2
,
%
tnpc
!
Single
Group
+
4
bubbles
wrpr
%
l7
,
(
TSTATE_PRIV
|
TSTATE_IE
),
%
tstate
!
Single
Group
+
4
bubbles
wrpr
%
l7
,
(
TSTATE_PRIV
|
TSTATE_IE
),
%
tstate
!
Single
Group
+
4
bubbles
stx
%
i0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I0
]
!
Store
Group
stx
%
i0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I0
]
!
Store
Group
stx
%
i1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I1
]
!
Store
Group
stx
%
i1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I1
]
!
Store
Group
stx
%
i2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I2
]
!
Store
Group
stx
%
i2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I2
]
!
Store
Group
stx
%
i3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I3
]
!
Store
Group
stx
%
i3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I3
]
!
Store
Group
stx
%
i4
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I4
]
!
Store
Group
stx
%
i4
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I4
]
!
Store
Group
stx
%
i5
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I5
]
!
Store
Group
stx
%
i5
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I5
]
!
Store
Group
stx
%
i6
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I6
]
!
Store
Group
stx
%
i6
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I6
]
!
Store
Group
mov
%
l6
,
%
g6
!
IEU1
mov
%
l6
,
%
g6
!
IEU1
stx
%
i7
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I7
]
!
Store
Group
stx
%
i7
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I7
]
!
Store
Group
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Load
Group
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Load
Group
done
done
nop
nop
...
...
arch/sparc64/kernel/head.S
View file @
bd4efa73
...
@@ -549,7 +549,7 @@ tlb_fixup_done:
...
@@ -549,7 +549,7 @@ tlb_fixup_done:
wr
%
g0
,
ASI_P
,
%
asi
wr
%
g0
,
ASI_P
,
%
asi
mov
1
,
%
g5
mov
1
,
%
g5
sllx
%
g5
,
THREAD_SHIFT
,
%
g5
sllx
%
g5
,
THREAD_SHIFT
,
%
g5
sub
%
g5
,
(
REGWIN
_SZ
+
STACK_BIAS
),
%
g5
sub
%
g5
,
(
STACKFRAME
_SZ
+
STACK_BIAS
),
%
g5
add
%
g6
,
%
g5
,
%
sp
add
%
g6
,
%
g5
,
%
sp
mov
0
,
%
fp
mov
0
,
%
fp
...
...
arch/sparc64/kernel/itlb_base.S
View file @
bd4efa73
...
@@ -59,7 +59,7 @@ sparc64_realfault_common: ! Called by TL0 dtlb_miss too
...
@@ -59,7 +59,7 @@ sparc64_realfault_common: ! Called by TL0 dtlb_miss too
/*
ITLB
**
ICACHE
line
3
:
Finish
faults
+
window
fixups
*/
/*
ITLB
**
ICACHE
line
3
:
Finish
faults
+
window
fixups
*/
call
do_sparc64_fault
!
Call
fault
handler
call
do_sparc64_fault
!
Call
fault
handler
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
!
Compute
pt_regs
arg
add
%
sp
,
PTREGS_OFF
,
%
o0
!
Compute
pt_regs
arg
ba
,
pt
%
xcc
,
rtrap_clr_l6
!
Restore
cpu
state
ba
,
pt
%
xcc
,
rtrap_clr_l6
!
Restore
cpu
state
nop
nop
winfix_trampoline
:
winfix_trampoline
:
...
...
arch/sparc64/kernel/module.c
View file @
bd4efa73
...
@@ -231,6 +231,13 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
...
@@ -231,6 +231,13 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
((
v
>>
10
)
&
0x3fffff
);
((
v
>>
10
)
&
0x3fffff
);
break
;
break
;
case
R_SPARC_OLO10
:
*
loc32
=
(
*
loc32
&
~
0x1fff
)
|
(((
v
&
0x3ff
)
+
(
ELF64_R_TYPE
(
rel
[
i
].
r_info
)
>>
8
))
&
0x1fff
);
break
;
default:
default:
printk
(
KERN_ERR
"module %s: Unknown relocation: %x
\n
"
,
printk
(
KERN_ERR
"module %s: Unknown relocation: %x
\n
"
,
me
->
name
,
me
->
name
,
...
...
arch/sparc64/kernel/process.c
View file @
bd4efa73
...
@@ -39,6 +39,7 @@
...
@@ -39,6 +39,7 @@
#include <asm/pstate.h>
#include <asm/pstate.h>
#include <asm/elf.h>
#include <asm/elf.h>
#include <asm/fpumacro.h>
#include <asm/fpumacro.h>
#include <asm/head.h>
/* #define VERBOSE_SHOWREGS */
/* #define VERBOSE_SHOWREGS */
...
@@ -341,8 +342,8 @@ void show_regs(struct pt_regs *regs)
...
@@ -341,8 +342,8 @@ void show_regs(struct pt_regs *regs)
regs
->
u_regs
[
14
]
>=
(
long
)
current
-
PAGE_SIZE
&&
regs
->
u_regs
[
14
]
>=
(
long
)
current
-
PAGE_SIZE
&&
regs
->
u_regs
[
14
]
<
(
long
)
current
+
6
*
PAGE_SIZE
)
{
regs
->
u_regs
[
14
]
<
(
long
)
current
+
6
*
PAGE_SIZE
)
{
printk
(
"*********parent**********
\n
"
);
printk
(
"*********parent**********
\n
"
);
__show_regs
((
struct
pt_regs
*
)(
regs
->
u_regs
[
14
]
+
STACK_BIAS
+
REGWIN_SZ
));
__show_regs
((
struct
pt_regs
*
)(
regs
->
u_regs
[
14
]
+
PTREGS_OFF
));
idump_from_user
(((
struct
pt_regs
*
)(
regs
->
u_regs
[
14
]
+
STACK_BIAS
+
REGWIN_SZ
))
->
tpc
);
idump_from_user
(((
struct
pt_regs
*
)(
regs
->
u_regs
[
14
]
+
PTREGS_OFF
))
->
tpc
);
printk
(
"*********endpar**********
\n
"
);
printk
(
"*********endpar**********
\n
"
);
}
}
#endif
#endif
...
@@ -508,11 +509,11 @@ void synchronize_user_stack(void)
...
@@ -508,11 +509,11 @@ void synchronize_user_stack(void)
flush_user_windows
();
flush_user_windows
();
if
((
window
=
get_thread_wsaved
())
!=
0
)
{
if
((
window
=
get_thread_wsaved
())
!=
0
)
{
int
winsize
=
REGWIN_SZ
;
int
winsize
=
sizeof
(
struct
reg_window
)
;
int
bias
=
0
;
int
bias
=
0
;
if
(
test_thread_flag
(
TIF_32BIT
))
if
(
test_thread_flag
(
TIF_32BIT
))
winsize
=
REGWIN32_SZ
;
winsize
=
sizeof
(
struct
reg_window32
)
;
else
else
bias
=
STACK_BIAS
;
bias
=
STACK_BIAS
;
...
@@ -533,11 +534,11 @@ void fault_in_user_windows(void)
...
@@ -533,11 +534,11 @@ void fault_in_user_windows(void)
{
{
struct
thread_info
*
t
=
current_thread_info
();
struct
thread_info
*
t
=
current_thread_info
();
unsigned
long
window
;
unsigned
long
window
;
int
winsize
=
REGWIN_SZ
;
int
winsize
=
sizeof
(
struct
reg_window
)
;
int
bias
=
0
;
int
bias
=
0
;
if
(
test_thread_flag
(
TIF_32BIT
))
if
(
test_thread_flag
(
TIF_32BIT
))
winsize
=
REGWIN32_SZ
;
winsize
=
sizeof
(
struct
reg_window32
)
;
else
else
bias
=
STACK_BIAS
;
bias
=
STACK_BIAS
;
...
@@ -610,14 +611,14 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
...
@@ -610,14 +611,14 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
p
->
set_child_tid
=
p
->
clear_child_tid
=
NULL
;
p
->
set_child_tid
=
p
->
clear_child_tid
=
NULL
;
/* Calculate offset to stack_frame & pt_regs */
/* Calculate offset to stack_frame & pt_regs */
child_trap_frame
=
((
char
*
)
t
)
+
(
THREAD_SIZE
-
(
TRACEREG_SZ
+
REGWIN
_SZ
));
child_trap_frame
=
((
char
*
)
t
)
+
(
THREAD_SIZE
-
(
TRACEREG_SZ
+
STACKFRAME
_SZ
));
memcpy
(
child_trap_frame
,
(((
struct
reg_window
*
)
regs
)
-
1
),
(
TRACEREG_SZ
+
REGWIN
_SZ
));
memcpy
(
child_trap_frame
,
(((
struct
sparc_stackf
*
)
regs
)
-
1
),
(
TRACEREG_SZ
+
STACKFRAME
_SZ
));
t
->
flags
=
(
t
->
flags
&
~
((
0xffUL
<<
TI_FLAG_CWP_SHIFT
)
|
(
0xffUL
<<
TI_FLAG_CURRENT_DS_SHIFT
)))
|
t
->
flags
=
(
t
->
flags
&
~
((
0xffUL
<<
TI_FLAG_CWP_SHIFT
)
|
(
0xffUL
<<
TI_FLAG_CURRENT_DS_SHIFT
)))
|
_TIF_NEWCHILD
|
_TIF_NEWCHILD
|
(((
regs
->
tstate
+
1
)
&
TSTATE_CWP
)
<<
TI_FLAG_CWP_SHIFT
);
(((
regs
->
tstate
+
1
)
&
TSTATE_CWP
)
<<
TI_FLAG_CWP_SHIFT
);
t
->
ksp
=
((
unsigned
long
)
child_trap_frame
)
-
STACK_BIAS
;
t
->
ksp
=
((
unsigned
long
)
child_trap_frame
)
-
STACK_BIAS
;
t
->
kregs
=
(
struct
pt_regs
*
)(
child_trap_frame
+
sizeof
(
struct
reg_window
));
t
->
kregs
=
(
struct
pt_regs
*
)(
child_trap_frame
+
sizeof
(
struct
sparc_stackf
));
t
->
fpsaved
[
0
]
=
0
;
t
->
fpsaved
[
0
]
=
0
;
if
(
regs
->
tstate
&
TSTATE_PRIV
)
{
if
(
regs
->
tstate
&
TSTATE_PRIV
)
{
...
@@ -636,7 +637,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
...
@@ -636,7 +637,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
flush_register_windows
();
flush_register_windows
();
memcpy
((
void
*
)(
t
->
ksp
+
STACK_BIAS
),
memcpy
((
void
*
)(
t
->
ksp
+
STACK_BIAS
),
(
void
*
)(
regs
->
u_regs
[
UREG_FP
]
+
STACK_BIAS
),
(
void
*
)(
regs
->
u_regs
[
UREG_FP
]
+
STACK_BIAS
),
sizeof
(
struct
reg_window
));
sizeof
(
struct
sparc_stackf
));
t
->
kregs
->
u_regs
[
UREG_G6
]
=
(
unsigned
long
)
t
;
t
->
kregs
->
u_regs
[
UREG_G6
]
=
(
unsigned
long
)
t
;
t
->
kregs
->
u_regs
[
UREG_G4
]
=
(
unsigned
long
)
t
->
task
;
t
->
kregs
->
u_regs
[
UREG_G4
]
=
(
unsigned
long
)
t
->
task
;
}
else
{
}
else
{
...
...
arch/sparc64/kernel/rtrap.S
View file @
bd4efa73
...
@@ -59,7 +59,7 @@ __handle_user_windows:
...
@@ -59,7 +59,7 @@ __handle_user_windows:
clr
%
o0
clr
%
o0
mov
%
l5
,
%
o2
mov
%
l5
,
%
o2
mov
%
l6
,
%
o3
mov
%
l6
,
%
o3
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o1
add
%
sp
,
PTREGS_OFF
,
%
o1
mov
%
l0
,
%
o4
mov
%
l0
,
%
o4
call
do_notify_resume
call
do_notify_resume
...
@@ -103,7 +103,7 @@ __handle_perfctrs:
...
@@ -103,7 +103,7 @@ __handle_perfctrs:
clr
%
o0
clr
%
o0
mov
%
l5
,
%
o2
mov
%
l5
,
%
o2
mov
%
l6
,
%
o3
mov
%
l6
,
%
o3
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o1
add
%
sp
,
PTREGS_OFF
,
%
o1
mov
%
l0
,
%
o4
mov
%
l0
,
%
o4
call
do_notify_resume
call
do_notify_resume
...
@@ -132,7 +132,7 @@ __handle_signal:
...
@@ -132,7 +132,7 @@ __handle_signal:
clr
%
o0
clr
%
o0
mov
%
l5
,
%
o2
mov
%
l5
,
%
o2
mov
%
l6
,
%
o3
mov
%
l6
,
%
o3
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o1
add
%
sp
,
PTREGS_OFF
,
%
o1
mov
%
l0
,
%
o4
mov
%
l0
,
%
o4
call
do_notify_resume
call
do_notify_resume
wrpr
%
g0
,
RTRAP_PSTATE
,
%
pstate
wrpr
%
g0
,
RTRAP_PSTATE
,
%
pstate
...
...
arch/sparc64/kernel/signal32.c
View file @
bd4efa73
...
@@ -812,7 +812,7 @@ setup_svr4_frame32(struct sigaction *sa, unsigned long pc, unsigned long npc,
...
@@ -812,7 +812,7 @@ setup_svr4_frame32(struct sigaction *sa, unsigned long pc, unsigned long npc,
save_and_clear_fpu
();
save_and_clear_fpu
();
regs
->
u_regs
[
UREG_FP
]
&=
0x00000000ffffffffUL
;
regs
->
u_regs
[
UREG_FP
]
&=
0x00000000ffffffffUL
;
sfp
=
(
svr4_signal_frame_t
*
)
get_sigframe
(
sa
,
regs
,
REGWIN_SZ
+
SVR4_SF_ALIGNED
);
sfp
=
(
svr4_signal_frame_t
*
)
get_sigframe
(
sa
,
regs
,
sizeof
(
struct
reg_window32
)
+
SVR4_SF_ALIGNED
);
if
(
invalid_frame_pointer
(
sfp
,
sizeof
(
*
sfp
)))
if
(
invalid_frame_pointer
(
sfp
,
sizeof
(
*
sfp
)))
do_exit
(
SIGILL
);
do_exit
(
SIGILL
);
...
...
arch/sparc64/kernel/trampoline.S
View file @
bd4efa73
...
@@ -195,7 +195,7 @@ startup_continue:
...
@@ -195,7 +195,7 @@ startup_continue:
mov
1
,
%
g5
mov
1
,
%
g5
sllx
%
g5
,
THREAD_SHIFT
,
%
g5
sllx
%
g5
,
THREAD_SHIFT
,
%
g5
sub
%
g5
,
(
REGWIN
_SZ
+
STACK_BIAS
),
%
g5
sub
%
g5
,
(
STACKFRAME
_SZ
+
STACK_BIAS
),
%
g5
add
%
g6
,
%
g5
,
%
sp
add
%
g6
,
%
g5
,
%
sp
mov
0
,
%
fp
mov
0
,
%
fp
...
...
arch/sparc64/kernel/us2e_cpufreq.c
View file @
bd4efa73
...
@@ -256,7 +256,8 @@ static void us2e_set_cpu_divider_index(unsigned int cpu, unsigned int index)
...
@@ -256,7 +256,8 @@ static void us2e_set_cpu_divider_index(unsigned int cpu, unsigned int index)
freqs
.
cpu
=
cpu
;
freqs
.
cpu
=
cpu
;
cpufreq_notify_transition
(
&
freqs
,
CPUFREQ_PRECHANGE
);
cpufreq_notify_transition
(
&
freqs
,
CPUFREQ_PRECHANGE
);
us2e_transition
(
estar
,
new_bits
,
clock_tick
,
old_divisor
,
divisor
);
if
(
old_divisor
!=
divisor
)
us2e_transition
(
estar
,
new_bits
,
clock_tick
,
old_divisor
,
divisor
);
cpufreq_notify_transition
(
&
freqs
,
CPUFREQ_POSTCHANGE
);
cpufreq_notify_transition
(
&
freqs
,
CPUFREQ_POSTCHANGE
);
...
...
arch/sparc64/kernel/winfixup.S
View file @
bd4efa73
...
@@ -80,7 +80,7 @@ fill_fixup:
...
@@ -80,7 +80,7 @@ fill_fixup:
*
since
we
must
preserve
%
l5
and
%
l6
,
see
comment
above
.
*
since
we
must
preserve
%
l5
and
%
l6
,
see
comment
above
.
*/
*/
call
do_sparc64_fault
call
do_sparc64_fault
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
ba
,
pt
%
xcc
,
rtrap
ba
,
pt
%
xcc
,
rtrap
nop
!
yes
,
nop
is
correct
nop
!
yes
,
nop
is
correct
...
@@ -158,7 +158,7 @@ window_scheisse_from_user_common:
...
@@ -158,7 +158,7 @@ window_scheisse_from_user_common:
ba
,
pt
%
xcc
,
etrap
ba
,
pt
%
xcc
,
etrap
rd
%
pc
,
%
g7
rd
%
pc
,
%
g7
call
do_sparc64_fault
call
do_sparc64_fault
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
ba
,
a
,
pt
%
xcc
,
rtrap_clr_l6
ba
,
a
,
pt
%
xcc
,
rtrap_clr_l6
.
globl
winfix_mna
,
fill_fixup_mna
,
spill_fixup_mna
.
globl
winfix_mna
,
fill_fixup_mna
,
spill_fixup_mna
...
@@ -197,7 +197,7 @@ fill_fixup_mna:
...
@@ -197,7 +197,7 @@ fill_fixup_mna:
mov
%
o7
,
%
g6
!
Get
current
back
.
mov
%
o7
,
%
g6
!
Get
current
back
.
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Finish
it
.
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Finish
it
.
call
mem_address_unaligned
call
mem_address_unaligned
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
b
,
pt
%
xcc
,
rtrap
b
,
pt
%
xcc
,
rtrap
nop
!
yes
,
the
nop
is
correct
nop
!
yes
,
the
nop
is
correct
...
@@ -258,7 +258,7 @@ window_mna_from_user_common:
...
@@ -258,7 +258,7 @@ window_mna_from_user_common:
mov
%
l4
,
%
o2
mov
%
l4
,
%
o2
mov
%
l5
,
%
o1
mov
%
l5
,
%
o1
call
mem_address_unaligned
call
mem_address_unaligned
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
ba
,
pt
%
xcc
,
rtrap
ba
,
pt
%
xcc
,
rtrap
clr
%
l6
clr
%
l6
...
@@ -303,7 +303,7 @@ fill_fixup_dax:
...
@@ -303,7 +303,7 @@ fill_fixup_dax:
mov
%
o7
,
%
g6
!
Get
current
back
.
mov
%
o7
,
%
g6
!
Get
current
back
.
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Finish
it
.
ldx
[%
g6
+
TI_TASK
],
%
g4
!
Finish
it
.
call
data_access_exception
call
data_access_exception
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
b
,
pt
%
xcc
,
rtrap
b
,
pt
%
xcc
,
rtrap
nop
!
yes
,
the
nop
is
correct
nop
!
yes
,
the
nop
is
correct
...
@@ -364,7 +364,7 @@ window_dax_from_user_common:
...
@@ -364,7 +364,7 @@ window_dax_from_user_common:
mov
%
l4
,
%
o1
mov
%
l4
,
%
o1
mov
%
l5
,
%
o2
mov
%
l5
,
%
o2
call
data_access_exception
call
data_access_exception
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
ba
,
pt
%
xcc
,
rtrap
ba
,
pt
%
xcc
,
rtrap
clr
%
l6
clr
%
l6
arch/sparc64/mm/ultra.S
View file @
bd4efa73
...
@@ -594,7 +594,7 @@ xcall_report_regs:
...
@@ -594,7 +594,7 @@ xcall_report_regs:
b
,
pt
%
xcc
,
etrap_irq
b
,
pt
%
xcc
,
etrap_irq
109
:
or
%
g7
,
%
lo
(
109
b
),
%
g7
109
:
or
%
g7
,
%
lo
(
109
b
),
%
g7
call
__show_regs
call
__show_regs
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
clr
%
l6
clr
%
l6
/
*
Has
to
be
a
non
-
v9
branch
due
to
the
large
distance
.
*/
/
*
Has
to
be
a
non
-
v9
branch
due
to
the
large
distance
.
*/
b
rtrap_xcall
b
rtrap_xcall
...
...
arch/sparc64/solaris/entry64.S
View file @
bd4efa73
...
@@ -34,7 +34,7 @@ solaris_syscall_trace:
...
@@ -34,7 +34,7 @@ solaris_syscall_trace:
be
,
pt
%
icc
,
2
f
be
,
pt
%
icc
,
2
f
srl
%
i2
,
0
,
%
o2
srl
%
i2
,
0
,
%
o2
b
,
pt
%
xcc
,
2
f
b
,
pt
%
xcc
,
2
f
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
solaris_sucks
:
solaris_sucks
:
/*
Solaris
is
a
big
system
which
needs
to
be
able
to
do
all
the
things
/*
Solaris
is
a
big
system
which
needs
to
be
able
to
do
all
the
things
...
@@ -91,7 +91,7 @@ entry64_personality_patch:
...
@@ -91,7 +91,7 @@ entry64_personality_patch:
sethi
%
hi
(
sys_call_table32
),
%
l6
sethi
%
hi
(
sys_call_table32
),
%
l6
andcc
%
l3
,
1
,
%
g0
andcc
%
l3
,
1
,
%
g0
bne
,
a
,
pn
%
icc
,
10
f
bne
,
a
,
pn
%
icc
,
10
f
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
10
:
srl
%
i2
,
0
,
%
o2
10
:
srl
%
i2
,
0
,
%
o2
mov
%
i5
,
%
o5
mov
%
i5
,
%
o5
andn
%
l3
,
3
,
%
l7
andn
%
l3
,
3
,
%
l7
...
@@ -101,11 +101,11 @@ entry64_personality_patch:
...
@@ -101,11 +101,11 @@ entry64_personality_patch:
2
:
call
%
l7
2
:
call
%
l7
srl
%
i3
,
0
,
%
o3
srl
%
i3
,
0
,
%
o3
ret_from_solaris
:
ret_from_solaris
:
stx
%
o0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I0
]
stx
%
o0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I0
]
ldx
[%
g6
+
TI_FLAGS
],
%
l6
ldx
[%
g6
+
TI_FLAGS
],
%
l6
sra
%
o0
,
0
,
%
o0
sra
%
o0
,
0
,
%
o0
mov
%
ulo
(
TSTATE_XCARRY
|
TSTATE_ICARRY
),
%
g2
mov
%
ulo
(
TSTATE_XCARRY
|
TSTATE_ICARRY
),
%
g2
ldx
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TSTATE
],
%
g3
ldx
[%
sp
+
PTREGS_OFF
+
PT_V9_TSTATE
],
%
g3
cmp
%
o0
,
-
ENOIOCTLCMD
cmp
%
o0
,
-
ENOIOCTLCMD
sllx
%
g2
,
32
,
%
g2
sllx
%
g2
,
32
,
%
g2
bgeu
,
pn
%
xcc
,
1
f
bgeu
,
pn
%
xcc
,
1
f
...
@@ -113,21 +113,21 @@ ret_from_solaris:
...
@@ -113,21 +113,21 @@ ret_from_solaris:
/
*
System
call
success
,
clear
Carry
condition
code
.
*/
/
*
System
call
success
,
clear
Carry
condition
code
.
*/
andn
%
g3
,
%
g2
,
%
g3
andn
%
g3
,
%
g2
,
%
g3
stx
%
g3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TSTATE
]
stx
%
g3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TSTATE
]
bne
,
pn
%
icc
,
solaris_syscall_trace2
bne
,
pn
%
icc
,
solaris_syscall_trace2
ldx
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
],
%
l1
ldx
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
],
%
l1
andcc
%
l1
,
1
,
%
g0
andcc
%
l1
,
1
,
%
g0
bne
,
pn
%
icc
,
2
f
bne
,
pn
%
icc
,
2
f
clr
%
l6
clr
%
l6
add
%
l1
,
0x4
,
%
l2
add
%
l1
,
0x4
,
%
l2
stx
%
l1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TPC
]
!
pc
=
npc
stx
%
l1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TPC
]
!
pc
=
npc
call
rtrap
call
rtrap
stx
%
l2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
]
!
npc
=
npc
+
4
stx
%
l2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
]
!
npc
=
npc
+
4
/
*
When
tnpc
&
1
,
this
comes
from
setcontext
and
we
don
't want to advance pc */
/
*
When
tnpc
&
1
,
this
comes
from
setcontext
and
we
don
't want to advance pc */
2
:
andn
%
l1
,
3
,
%
l1
2
:
andn
%
l1
,
3
,
%
l1
call
rtrap
call
rtrap
stx
%
l1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
]
!
npc
=
npc
&
~
3
stx
%
l1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
]
!
npc
=
npc
&
~
3
1
:
1
:
/
*
System
call
failure
,
set
Carry
condition
code
.
/
*
System
call
failure
,
set
Carry
condition
code
.
...
@@ -143,17 +143,17 @@ ret_from_solaris:
...
@@ -143,17 +143,17 @@ ret_from_solaris:
sll
%
o0
,
2
,
%
o0
sll
%
o0
,
2
,
%
o0
or
%
l6
,
%
lo
(
solaris_err_table
),
%
l6
or
%
l6
,
%
lo
(
solaris_err_table
),
%
l6
ldsw
[%
l6
+
%
o0
],
%
o0
ldsw
[%
l6
+
%
o0
],
%
o0
1
:
stx
%
o0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I0
]
1
:
stx
%
o0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I0
]
mov
1
,
%
l6
mov
1
,
%
l6
stx
%
g3
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TSTATE
]
stx
%
g3
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TSTATE
]
bne
,
pn
%
icc
,
solaris_syscall_trace2
bne
,
pn
%
icc
,
solaris_syscall_trace2
ldx
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
],
%
l1
ldx
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
],
%
l1
andcc
%
l1
,
1
,
%
g0
andcc
%
l1
,
1
,
%
g0
bne
,
pn
%
icc
,
2
b
bne
,
pn
%
icc
,
2
b
add
%
l1
,
0x4
,
%
l2
add
%
l1
,
0x4
,
%
l2
stx
%
l1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TPC
]
!
pc
=
npc
stx
%
l1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TPC
]
!
pc
=
npc
call
rtrap
call
rtrap
stx
%
l2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
]
!
npc
=
npc
+
4
stx
%
l2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
]
!
npc
=
npc
+
4
solaris_syscall_trace2
:
solaris_syscall_trace2
:
call
syscall_trace
call
syscall_trace
...
@@ -161,9 +161,9 @@ solaris_syscall_trace2:
...
@@ -161,9 +161,9 @@ solaris_syscall_trace2:
andcc
%
l1
,
1
,
%
g0
andcc
%
l1
,
1
,
%
g0
bne
,
pn
%
icc
,
2
b
bne
,
pn
%
icc
,
2
b
nop
nop
stx
%
l1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TPC
]
stx
%
l1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TPC
]
call
rtrap
call
rtrap
stx
%
l2
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_TNPC
]
stx
%
l2
,
[%
sp
+
PTREGS_OFF
+
PT_V9_TNPC
]
/
*
This
one
is
tricky
,
so
that
's why we do it in assembly */
/
*
This
one
is
tricky
,
so
that
's why we do it in assembly */
.
globl
solaris_sigsuspend
.
globl
solaris_sigsuspend
...
@@ -173,14 +173,14 @@ solaris_sigsuspend:
...
@@ -173,14 +173,14 @@ solaris_sigsuspend:
brlz
,
pn
%
o0
,
ret_from_solaris
brlz
,
pn
%
o0
,
ret_from_solaris
nop
nop
call
sys_sigsuspend
call
sys_sigsuspend
stx
%
o0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I0
]
stx
%
o0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I0
]
.
globl
solaris_getpid
.
globl
solaris_getpid
solaris_getpid
:
solaris_getpid
:
call
sys_getppid
call
sys_getppid
nop
nop
call
sys_getpid
call
sys_getpid
stx
%
o0
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I1
]
stx
%
o0
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I1
]
b
,
pt
%
xcc
,
ret_from_solaris
b
,
pt
%
xcc
,
ret_from_solaris
nop
nop
...
@@ -189,7 +189,7 @@ solaris_getuid:
...
@@ -189,7 +189,7 @@ solaris_getuid:
call
sys_geteuid
call
sys_geteuid
nop
nop
call
sys_getuid
call
sys_getuid
stx
%
o1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I1
]
stx
%
o1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I1
]
b
,
pt
%
xcc
,
ret_from_solaris
b
,
pt
%
xcc
,
ret_from_solaris
nop
nop
...
@@ -198,14 +198,14 @@ solaris_getgid:
...
@@ -198,14 +198,14 @@ solaris_getgid:
call
sys_getegid
call
sys_getegid
nop
nop
call
sys_getgid
call
sys_getgid
stx
%
o1
,
[%
sp
+
STACK_BIAS
+
REGWIN_SZ
+
PT_V9_I1
]
stx
%
o1
,
[%
sp
+
PTREGS_OFF
+
PT_V9_I1
]
b
,
pt
%
xcc
,
ret_from_solaris
b
,
pt
%
xcc
,
ret_from_solaris
nop
nop
.
globl
solaris_unimplemented
.
globl
solaris_unimplemented
solaris_unimplemented
:
solaris_unimplemented
:
call
do_sol_unimplemented
call
do_sol_unimplemented
add
%
sp
,
STACK_BIAS
+
REGWIN_SZ
,
%
o0
add
%
sp
,
PTREGS_OFF
,
%
o0
ba
,
pt
%
xcc
,
ret_from_solaris
ba
,
pt
%
xcc
,
ret_from_solaris
nop
nop
...
...
include/asm-sparc64/head.h
View file @
bd4efa73
...
@@ -6,7 +6,7 @@
...
@@ -6,7 +6,7 @@
#define KERNBASE 0x400000
#define KERNBASE 0x400000
#define PTREGS_OFF (STACK_BIAS +
REGWIN
_SZ)
#define PTREGS_OFF (STACK_BIAS +
STACKFRAME
_SZ)
#define __CHEETAH_ID 0x003e0014
#define __CHEETAH_ID 0x003e0014
...
...
include/asm-sparc64/processor.h
View file @
bd4efa73
...
@@ -139,7 +139,7 @@ do { \
...
@@ -139,7 +139,7 @@ do { \
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"wrpr %%g0, (1 << 3), %%wstate\n\t" \
"wrpr %%g0, (1 << 3), %%wstate\n\t" \
: \
: \
: "r" (regs), "r" (sp -
REGWIN_SZ
- STACK_BIAS), \
: "r" (regs), "r" (sp -
sizeof(struct reg_window)
- STACK_BIAS), \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
} while (0)
} while (0)
...
@@ -179,7 +179,7 @@ do { \
...
@@ -179,7 +179,7 @@ do { \
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"wrpr %%g0, (2 << 3), %%wstate\n\t" \
"wrpr %%g0, (2 << 3), %%wstate\n\t" \
: \
: \
: "r" (regs), "r" (sp -
REGWIN32_SZ
), \
: "r" (regs), "r" (sp -
sizeof(struct reg_window32)
), \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
} while (0)
} while (0)
...
...
include/asm-sparc64/ptrace.h
View file @
bd4efa73
...
@@ -89,11 +89,9 @@ struct sparc_trapf {
...
@@ -89,11 +89,9 @@ struct sparc_trapf {
#define TRACEREG_SZ sizeof(struct pt_regs)
#define TRACEREG_SZ sizeof(struct pt_regs)
#define STACKFRAME_SZ sizeof(struct sparc_stackf)
#define STACKFRAME_SZ sizeof(struct sparc_stackf)
#define REGWIN_SZ sizeof(struct reg_window)
#define TRACEREG32_SZ sizeof(struct pt_regs32)
#define TRACEREG32_SZ sizeof(struct pt_regs32)
#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
#define REGWIN32_SZ sizeof(struct reg_window32)
#ifdef __KERNEL__
#ifdef __KERNEL__
#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
...
@@ -105,11 +103,9 @@ extern void show_regs(struct pt_regs *);
...
@@ -105,11 +103,9 @@ extern void show_regs(struct pt_regs *);
/* For assembly code. */
/* For assembly code. */
#define TRACEREG_SZ 0xa0
#define TRACEREG_SZ 0xa0
#define STACKFRAME_SZ 0xc0
#define STACKFRAME_SZ 0xc0
#define REGWIN_SZ 0x80
#define TRACEREG32_SZ 0x50
#define TRACEREG32_SZ 0x50
#define STACKFRAME32_SZ 0x60
#define STACKFRAME32_SZ 0x60
#define REGWIN32_SZ 0x40
#endif
#endif
#ifdef __KERNEL__
#ifdef __KERNEL__
...
...
include/asm-sparc64/ttable.h
View file @
bd4efa73
...
@@ -27,7 +27,7 @@
...
@@ -27,7 +27,7 @@
ba,pt %xcc, etrap; \
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
call routine; \
call routine; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
clr %l6; \
clr %l6; \
nop;
nop;
...
@@ -37,7 +37,7 @@
...
@@ -37,7 +37,7 @@
ba,pt %xcc, etrap; \
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
call routine; \
call routine; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
clr %l6;
clr %l6;
...
@@ -46,7 +46,7 @@
...
@@ -46,7 +46,7 @@
ba,pt %xcc, do_fptrap; \
ba,pt %xcc, do_fptrap; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
call routine; \
call routine; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
clr %l6; \
clr %l6; \
nop;
nop;
...
@@ -66,7 +66,7 @@
...
@@ -66,7 +66,7 @@
ba,pt %xcc, etraptl1; \
ba,pt %xcc, etraptl1; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
call routine; \
call routine; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
clr %l6; \
clr %l6; \
nop;
nop;
...
@@ -75,7 +75,7 @@
...
@@ -75,7 +75,7 @@
sethi %hi(109f), %g7; \
sethi %hi(109f), %g7; \
ba,pt %xcc, etrap; \
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
call routine; \
call routine; \
mov arg, %o1; \
mov arg, %o1; \
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
...
@@ -85,7 +85,7 @@
...
@@ -85,7 +85,7 @@
sethi %hi(109f), %g7; \
sethi %hi(109f), %g7; \
ba,pt %xcc, etraptl1; \
ba,pt %xcc, etraptl1; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
call routine; \
call routine; \
mov arg, %o1; \
mov arg, %o1; \
ba,pt %xcc, rtrap; \
ba,pt %xcc, rtrap; \
...
@@ -142,7 +142,7 @@
...
@@ -142,7 +142,7 @@
rd %pc, %g7; \
rd %pc, %g7; \
mov level, %o0; \
mov level, %o0; \
call routine; \
call routine; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o1;
\
add %sp,
PTREGS_OFF, %o1;
\
ba,a,pt %xcc, rtrap_irq;
ba,a,pt %xcc, rtrap_irq;
#define TICK_SMP_IRQ \
#define TICK_SMP_IRQ \
...
@@ -152,7 +152,7 @@
...
@@ -152,7 +152,7 @@
b,pt %xcc, etrap_irq; \
b,pt %xcc, etrap_irq; \
109: or %g7, %lo(109b), %g7; \
109: or %g7, %lo(109b), %g7; \
call smp_percpu_timer_interrupt; \
call smp_percpu_timer_interrupt; \
add %sp,
STACK_BIAS + REGWIN_SZ, %o0;
\
add %sp,
PTREGS_OFF, %o0;
\
ba,a,pt %xcc, rtrap_irq;
ba,a,pt %xcc, rtrap_irq;
#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
...
@@ -165,11 +165,11 @@
...
@@ -165,11 +165,11 @@
ba,pt %xcc, etrap; \
ba,pt %xcc, etrap; \
rd %pc, %g7; \
rd %pc, %g7; \
flushw; \
flushw; \
ldx [%sp +
STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1;
\
ldx [%sp +
PTREGS_OFF + PT_V9_TNPC], %l1;
\
add %l1, 4, %l2; \
add %l1, 4, %l2; \
stx %l1, [%sp +
STACK_BIAS + REGWIN_SZ + PT_V9_TPC];
\
stx %l1, [%sp +
PTREGS_OFF + PT_V9_TPC];
\
ba,pt %xcc, rtrap_clr_l6; \
ba,pt %xcc, rtrap_clr_l6; \
stx %l2, [%sp +
STACK_BIAS + REGWIN_SZ
+ PT_V9_TNPC];
stx %l2, [%sp +
PTREGS_OFF
+ PT_V9_TNPC];
/* Before touching these macros, you owe it to yourself to go and
/* Before touching these macros, you owe it to yourself to go and
* see how arch/sparc64/kernel/winfixup.S works... -DaveM
* see how arch/sparc64/kernel/winfixup.S works... -DaveM
...
...
include/linux/elf.h
View file @
bd4efa73
...
@@ -274,6 +274,10 @@ typedef struct {
...
@@ -274,6 +274,10 @@ typedef struct {
#define R_MIPS_LOVENDOR 100
#define R_MIPS_LOVENDOR 100
#define R_MIPS_HIVENDOR 127
#define R_MIPS_HIVENDOR 127
/*
* Sparc section types
*/
#define STT_REGISTER 13
/*
/*
* Sparc ELF relocation types
* Sparc ELF relocation types
...
@@ -311,6 +315,7 @@ typedef struct {
...
@@ -311,6 +315,7 @@ typedef struct {
#define R_SPARC_10 30
#define R_SPARC_10 30
#define R_SPARC_11 31
#define R_SPARC_11 31
#define R_SPARC_64 32
#define R_SPARC_64 32
#define R_SPARC_OLO10 33
#define R_SPARC_WDISP16 40
#define R_SPARC_WDISP16 40
#define R_SPARC_WDISP19 41
#define R_SPARC_WDISP19 41
#define R_SPARC_7 43
#define R_SPARC_7 43
...
...
kernel/module.c
View file @
bd4efa73
...
@@ -974,6 +974,11 @@ static int simplify_symbols(Elf_Shdr *sechdrs,
...
@@ -974,6 +974,11 @@ static int simplify_symbols(Elf_Shdr *sechdrs,
/* Ok if weak. */
/* Ok if weak. */
if
(
ELF_ST_BIND
(
sym
[
i
].
st_info
)
==
STB_WEAK
)
if
(
ELF_ST_BIND
(
sym
[
i
].
st_info
)
==
STB_WEAK
)
break
;
break
;
#if defined(CONFIG_SPARC32) || defined(CONFIG_SPARC64)
/* Ok if Sparc register directive. */
if
(
ELF_ST_TYPE
(
sym
[
i
].
st_info
)
==
STT_REGISTER
)
break
;
#endif
printk
(
KERN_WARNING
"%s: Unknown symbol %s
\n
"
,
printk
(
KERN_WARNING
"%s: Unknown symbol %s
\n
"
,
mod
->
name
,
strtab
+
sym
[
i
].
st_name
);
mod
->
name
,
strtab
+
sym
[
i
].
st_name
);
...
...
scripts/modpost.c
View file @
bd4efa73
...
@@ -296,6 +296,12 @@ handle_modversions(struct module *mod, struct elf_info *info,
...
@@ -296,6 +296,12 @@ handle_modversions(struct module *mod, struct elf_info *info,
/* ignore global offset table */
/* ignore global offset table */
if
(
strcmp
(
symname
,
"_GLOBAL_OFFSET_TABLE_"
)
==
0
)
if
(
strcmp
(
symname
,
"_GLOBAL_OFFSET_TABLE_"
)
==
0
)
break
;
break
;
if
(
info
->
hdr
->
e_machine
==
EM_SPARC
||
info
->
hdr
->
e_machine
==
EM_SPARCV9
)
{
/* Ignore register directives. */
if
(
ELF_ST_TYPE
(
sym
->
st_info
)
==
STT_REGISTER
)
break
;
}
if
(
memcmp
(
symname
,
MODULE_SYMBOL_PREFIX
,
if
(
memcmp
(
symname
,
MODULE_SYMBOL_PREFIX
,
strlen
(
MODULE_SYMBOL_PREFIX
))
==
0
)
{
strlen
(
MODULE_SYMBOL_PREFIX
))
==
0
)
{
...
...
scripts/modpost.h
View file @
bd4efa73
...
@@ -17,6 +17,7 @@
...
@@ -17,6 +17,7 @@
#define Elf_Shdr Elf32_Shdr
#define Elf_Shdr Elf32_Shdr
#define Elf_Sym Elf32_Sym
#define Elf_Sym Elf32_Sym
#define ELF_ST_BIND ELF32_ST_BIND
#define ELF_ST_BIND ELF32_ST_BIND
#define ELF_ST_TYPE ELF32_ST_TYPE
#else
#else
...
@@ -24,6 +25,7 @@
...
@@ -24,6 +25,7 @@
#define Elf_Shdr Elf64_Shdr
#define Elf_Shdr Elf64_Shdr
#define Elf_Sym Elf64_Sym
#define Elf_Sym Elf64_Sym
#define ELF_ST_BIND ELF64_ST_BIND
#define ELF_ST_BIND ELF64_ST_BIND
#define ELF_ST_TYPE ELF64_ST_TYPE
#endif
#endif
...
...
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