Commit be3f39c8 authored by Roger Quadros's avatar Roger Quadros Committed by Tony Lindgren

ARM: dts: am437x: Fix NAND device nodes

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 79c08261
...@@ -893,6 +893,8 @@ gpmc: gpmc@50000000 { ...@@ -893,6 +893,8 @@ gpmc: gpmc@50000000 {
gpmc,num-waitpins = <2>; gpmc,num-waitpins = <2>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
interrupt-controller;
#interrupt-cells = <2>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -146,7 +146,11 @@ &gpmc { ...@@ -146,7 +146,11 @@ &gpmc {
pinctrl-0 = <&nand_flash_x8>; pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x1000000>; ranges = <0 0 0x08000000 0x1000000>;
nand@0,0 { nand@0,0 {
reg = <0 0 0>; compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
......
...@@ -812,9 +812,13 @@ &gpmc { ...@@ -812,9 +812,13 @@ &gpmc {
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>; pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 { nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* device IO registers */ reg = <0 0 4>; /* device IO registers */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16"; ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
...@@ -561,9 +561,13 @@ &gpmc { ...@@ -561,9 +561,13 @@ &gpmc {
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */ status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>; pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 { nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "bch16"; ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
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