iio:adc:ad7298 make the tx and rx buffers __be16

These buffers are a little interesting in that their
content may have variable endianness, but all but one
element will definitely be big endian.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>

drivers/iio/adc/ad7298.c

@@ -54,8 +54,8 @@ struct ad7298_state {
 	 * DMA (thus cache coherency maintenance) requires the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	unsigned short			rx_buf[12] ____cacheline_aligned;
-	unsigned short			tx_buf[2];
+	__be16				rx_buf[12] ____cacheline_aligned;
+	__be16				tx_buf[2];
 };
 
 #define AD7298_V_CHAN(index)						\