Commit c04d66bb authored by Bryan Wu's avatar Bryan Wu

Blackfin arch: clean up some coding style issues

Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 1d189474
...@@ -371,8 +371,8 @@ int __init init_arch_irq(void) ...@@ -371,8 +371,8 @@ int __init init_arch_irq(void)
bfin_write_SICA_IMASK1(SIC_UNMASK_ALL); bfin_write_SICA_IMASK1(SIC_UNMASK_ALL);
SSYNC(); SSYNC();
bfin_write_SICA_IWR0(IWR_ENABLE_ALL); bfin_write_SICA_IWR0(IWR_ENABLE_ALL);
bfin_write_SICA_IWR1(IWR_ENABLE_ALL); bfin_write_SICA_IWR1(IWR_ENABLE_ALL);
local_irq_disable(); local_irq_disable();
......
...@@ -147,8 +147,8 @@ static void bfin_internal_mask_irq(unsigned int irq) ...@@ -147,8 +147,8 @@ static void bfin_internal_mask_irq(unsigned int irq)
unsigned mask_bank, mask_bit; unsigned mask_bank, mask_bit;
mask_bank = (irq - (IRQ_CORETMR + 1)) / 32; mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
mask_bit = (irq - (IRQ_CORETMR + 1)) % 32; mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
bfin_write_SIC_IMASK( mask_bank, bfin_read_SIC_IMASK(mask_bank) & \ bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
~(1 << mask_bit)); ~(1 << mask_bit));
#endif #endif
SSYNC(); SSYNC();
} }
...@@ -161,9 +161,9 @@ static void bfin_internal_unmask_irq(unsigned int irq) ...@@ -161,9 +161,9 @@ static void bfin_internal_unmask_irq(unsigned int irq)
#else #else
unsigned mask_bank, mask_bit; unsigned mask_bank, mask_bit;
mask_bank = (irq - (IRQ_CORETMR + 1)) / 32; mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
mask_bit = (irq - (IRQ_CORETMR + 1))%32; mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | \ bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
( 1 << mask_bit)); (1 << mask_bit));
#endif #endif
SSYNC(); SSYNC();
} }
...@@ -728,7 +728,7 @@ int __init init_arch_irq(void) ...@@ -728,7 +728,7 @@ int __init init_arch_irq(void)
bfin_write_SIC_IMASK2(SIC_UNMASK_ALL); bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
bfin_write_SIC_IWR0(IWR_ENABLE_ALL); bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
bfin_write_SIC_IWR1(IWR_ENABLE_ALL); bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
bfin_write_SIC_IWR2(IWR_ENABLE_ALL); bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
#else #else
bfin_write_SIC_IMASK(SIC_UNMASK_ALL); bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
bfin_write_SIC_IWR(IWR_ENABLE_ALL); bfin_write_SIC_IWR(IWR_ENABLE_ALL);
...@@ -878,7 +878,6 @@ void do_irq(int vec, struct pt_regs *fp) ...@@ -878,7 +878,6 @@ void do_irq(int vec, struct pt_regs *fp)
sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0); sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0);
sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1); sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1);
sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2); sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2);
for (;; ivg++) { for (;; ivg++) {
if (ivg >= ivg_stop) { if (ivg >= ivg_stop) {
......
...@@ -68,7 +68,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) ...@@ -68,7 +68,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
bfin_write32(SIC_IWR0, iwr0); bfin_write32(SIC_IWR0, iwr0);
bfin_write32(SIC_IWR1, iwr1); bfin_write32(SIC_IWR1, iwr1);
bfin_write32(SIC_IWR2, iwr2); bfin_write32(SIC_IWR2, iwr2);
} }
#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
......
...@@ -74,7 +74,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) ...@@ -74,7 +74,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
local_irq_restore(flags); local_irq_restore(flags);
bfin_write32(SICA_IWR0, iwr0); bfin_write32(SICA_IWR0, iwr0);
bfin_write32(SICA_IWR1, iwr1); bfin_write32(SICA_IWR1, iwr1);
} }
#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
......
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
#define MAP_NORESERVE 0x4000 /* don't check for reservations */ #define MAP_NORESERVE 0x4000 /* don't check for reservations */
#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ #define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
#define MAP_NONBLOCK 0x10000 /* do not block on IO */ #define MAP_NONBLOCK 0x10000 /* do not block on IO */
#define MAP_UNINITIALIZE 0x4000000 /* For anonymous mmap, memory could
be uninitialized. */
#define MS_ASYNC 1 /* sync memory asynchronously */ #define MS_ASYNC 1 /* sync memory asynchronously */
#define MS_INVALIDATE 2 /* invalidate the caches */ #define MS_INVALIDATE 2 /* invalidate the caches */
......
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