Commit c08b7b3e authored by Eric Miao's avatar Eric Miao Committed by Russell King

[ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS

1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
   and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specific to the high IRQ numbers (32..64) to be
   PXA27x specific

3. add a function pxa_init_irq_high() to initialize the internal
   high IRQ chip, the invoke of this function could be moved to
   PXA27x specific initialization code
Signed-off-by: default avatareric miao <eric.miao@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 486c9551
...@@ -67,7 +67,7 @@ static struct irq_chip pxa_internal_chip_low = { ...@@ -67,7 +67,7 @@ static struct irq_chip pxa_internal_chip_low = {
.set_wake = pxa_set_wake, .set_wake = pxa_set_wake,
}; };
#if PXA_INTERNAL_IRQS > 32 #ifdef CONFIG_PXA27x
/* /*
* This is for the second set of internal IRQs as found on the PXA27x. * This is for the second set of internal IRQs as found on the PXA27x.
...@@ -90,6 +90,19 @@ static struct irq_chip pxa_internal_chip_high = { ...@@ -90,6 +90,19 @@ static struct irq_chip pxa_internal_chip_high = {
.unmask = pxa_unmask_high_irq, .unmask = pxa_unmask_high_irq,
}; };
void __init pxa_init_irq_high(void)
{
int irq;
ICMR2 = 0;
ICLR2 = 0;
for (irq = PXA_IRQ(32); irq < PXA_IRQ(64); irq++) {
set_irq_chip(irq, &pxa_internal_chip_high);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
}
#endif #endif
/* Note that if an input/irq line ever gets changed to an output during /* Note that if an input/irq line ever gets changed to an output during
...@@ -314,7 +327,6 @@ static struct irq_chip pxa_muxed_gpio_chip = { ...@@ -314,7 +327,6 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.set_wake = pxa_set_gpio_wake, .set_wake = pxa_set_gpio_wake,
}; };
void __init pxa_init_irq(void) void __init pxa_init_irq(void)
{ {
int irq; int irq;
...@@ -338,8 +350,6 @@ void __init pxa_init_irq(void) ...@@ -338,8 +350,6 @@ void __init pxa_init_irq(void)
#ifdef CONFIG_PXA27x #ifdef CONFIG_PXA27x
/* And similarly for the extra regs on the PXA27x */ /* And similarly for the extra regs on the PXA27x */
ICMR2 = 0;
ICLR2 = 0;
GFER3 = 0; GFER3 = 0;
GRER3 = 0; GRER3 = 0;
GEDR3 = GEDR3; GEDR3 = GEDR3;
...@@ -357,12 +367,8 @@ void __init pxa_init_irq(void) ...@@ -357,12 +367,8 @@ void __init pxa_init_irq(void)
set_irq_flags(irq, IRQF_VALID); set_irq_flags(irq, IRQF_VALID);
} }
#if PXA_INTERNAL_IRQS > 32 #ifdef CONFIG_PXA27x
for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) { pxa_init_irq_high();
set_irq_chip(irq, &pxa_internal_chip_high);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
#endif #endif
for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
......
...@@ -55,18 +55,15 @@ ...@@ -55,18 +55,15 @@
#ifdef CONFIG_PXA27x #ifdef CONFIG_PXA27x
#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
#define PXA_INTERNAL_IRQS 34
#else
#define PXA_INTERNAL_IRQS 32
#endif #endif
#define GPIO_2_x_TO_IRQ(x) \ #define PXA_GPIO_IRQ_BASE (64)
PXA_IRQ((x) - 2 + PXA_INTERNAL_IRQS) #define PXA_GPIO_IRQ_NUM (128)
#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
#define IRQ_TO_GPIO_2_x(i) \ #define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE)
((i) - IRQ_GPIO(2) + 2)
#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
#if defined(CONFIG_PXA25x) #if defined(CONFIG_PXA25x)
...@@ -81,7 +78,7 @@ ...@@ -81,7 +78,7 @@
* these. If you need more, increase IRQ_BOARD_END, but keep it * these. If you need more, increase IRQ_BOARD_END, but keep it
* within sensible limits. * within sensible limits.
*/ */
#define IRQ_BOARD_START (IRQ_GPIO(PXA_LAST_GPIO) + 1) #define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
#define IRQ_BOARD_END (IRQ_BOARD_START + 16) #define IRQ_BOARD_END (IRQ_BOARD_START + 16)
#define IRQ_SA1111_START (IRQ_BOARD_END) #define IRQ_SA1111_START (IRQ_BOARD_END)
......
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