Commit c28f8259 authored by Felipe Balbi's avatar Felipe Balbi

usb: dwc3: switch trb enqueue/dequeue and first_trb_index to u8

We *know* that we have 1 PAGE (4096 bytes) for our
TRB poll. We also know the size of each TRB and know
that we can fit 256 of them in one PAGE. By using a
u8 type we can make sure that:

	enqueue++ % 256;

gets optimized to an increment only.
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 5ef68c56
......@@ -470,8 +470,6 @@ struct dwc3_ep {
struct dwc3_trb *trb_pool;
dma_addr_t trb_pool_dma;
u32 trb_enqueue;
u32 trb_dequeue;
const struct usb_ss_ep_comp_descriptor *comp_desc;
struct dwc3 *dwc;
......@@ -487,6 +485,18 @@ struct dwc3_ep {
/* This last one is specific to EP0 */
#define DWC3_EP0_DIR_IN (1 << 31)
/*
* IMPORTANT: we *know* we have 256 TRBs in our @trb_pool, so we will
* use a u8 type here. If anybody decides to increase number of TRBs to
* anything larger than 256 - I can't see why people would want to do
* this though - then this type needs to be changed.
*
* By using u8 types we ensure that our % operator when incrementing
* enqueue and dequeue get optimized away by the compiler.
*/
u8 trb_enqueue;
u8 trb_dequeue;
u8 number;
u8 type;
u8 resource_index;
......@@ -641,8 +651,8 @@ struct dwc3_request {
struct usb_request request;
struct list_head list;
struct dwc3_ep *dep;
u32 first_trb_index;
u8 first_trb_index;
u8 epnum;
struct dwc3_trb *trb;
dma_addr_t trb_dma;
......
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