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nexedi
linux
Commits
c3455b0e
Commit
c3455b0e
authored
Jun 30, 2005
by
Maciej W. Rozycki
Committed by
Ralf Baechle
Oct 29, 2005
Browse files
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Plain Diff
Inline ioremap() calls for constant addresses that map to KSEG1.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
c134a5ec
Changes
5
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Showing
5 changed files
with
86 additions
and
15 deletions
+86
-15
arch/mips/au1000/common/setup.c
arch/mips/au1000/common/setup.c
+1
-1
arch/mips/mm/ioremap.c
arch/mips/mm/ioremap.c
+3
-12
include/asm-mips/io.h
include/asm-mips/io.h
+29
-2
include/asm-mips/mach-au1x00/ioremap.h
include/asm-mips/mach-au1x00/ioremap.h
+30
-0
include/asm-mips/mach-generic/ioremap.h
include/asm-mips/mach-generic/ioremap.h
+23
-0
No files found.
arch/mips/au1000/common/setup.c
View file @
c3455b0e
...
@@ -155,7 +155,7 @@ void __init plat_setup(void)
...
@@ -155,7 +155,7 @@ void __init plat_setup(void)
#if defined(CONFIG_64BIT_PHYS_ADDR)
#if defined(CONFIG_64BIT_PHYS_ADDR)
/* This routine should be valid for all Au1x based boards */
/* This routine should be valid for all Au1x based boards */
phys_t
fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
phys_t
__
fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
{
{
u32
start
,
end
;
u32
start
,
end
;
...
...
arch/mips/mm/ioremap.c
View file @
c3455b0e
...
@@ -101,15 +101,6 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
...
@@ -101,15 +101,6 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
return
error
;
return
error
;
}
}
/*
* Allow physical addresses to be fixed up to help 36 bit peripherals.
*/
phys_t
__attribute__
((
weak
))
fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
{
return
phys_addr
;
}
/*
/*
* Generic mapping function (not visible outside):
* Generic mapping function (not visible outside):
*/
*/
...
@@ -126,7 +117,7 @@ fixup_bigphys_addr(phys_t phys_addr, phys_t size)
...
@@ -126,7 +117,7 @@ fixup_bigphys_addr(phys_t phys_addr, phys_t size)
#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
void
*
__ioremap
(
phys_t
phys_addr
,
phys_t
size
,
unsigned
long
flags
)
void
__iomem
*
__ioremap
(
phys_t
phys_addr
,
phys_t
size
,
unsigned
long
flags
)
{
{
struct
vm_struct
*
area
;
struct
vm_struct
*
area
;
unsigned
long
offset
;
unsigned
long
offset
;
...
@@ -146,7 +137,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
...
@@ -146,7 +137,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
*/
*/
if
(
IS_LOW512
(
phys_addr
)
&&
IS_LOW512
(
last_addr
)
&&
if
(
IS_LOW512
(
phys_addr
)
&&
IS_LOW512
(
last_addr
)
&&
flags
==
_CACHE_UNCACHED
)
flags
==
_CACHE_UNCACHED
)
return
(
void
*
)
CKSEG1ADDR
(
phys_addr
);
return
(
void
__iomem
*
)
CKSEG1ADDR
(
phys_addr
);
/*
/*
* Don't allow anybody to remap normal RAM that we're using..
* Don't allow anybody to remap normal RAM that we're using..
...
@@ -182,7 +173,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
...
@@ -182,7 +173,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
return
NULL
;
return
NULL
;
}
}
return
(
void
*
)
(
offset
+
(
char
*
)
addr
);
return
(
void
__iomem
*
)
(
offset
+
(
char
*
)
addr
);
}
}
#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
...
...
include/asm-mips/io.h
View file @
c3455b0e
...
@@ -27,6 +27,7 @@
...
@@ -27,6 +27,7 @@
#include <asm/processor.h>
#include <asm/processor.h>
#include <asm/string.h>
#include <asm/string.h>
#include <ioremap.h>
#include <mangle-port.h>
#include <mangle-port.h>
/*
/*
...
@@ -209,6 +210,8 @@ extern void __iounmap(volatile void __iomem *addr);
...
@@ -209,6 +210,8 @@ extern void __iounmap(volatile void __iomem *addr);
static
inline
void
__iomem
*
__ioremap_mode
(
phys_t
offset
,
unsigned
long
size
,
static
inline
void
__iomem
*
__ioremap_mode
(
phys_t
offset
,
unsigned
long
size
,
unsigned
long
flags
)
unsigned
long
flags
)
{
{
#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
if
(
cpu_has_64bit_addresses
)
{
if
(
cpu_has_64bit_addresses
)
{
u64
base
=
UNCAC_BASE
;
u64
base
=
UNCAC_BASE
;
...
@@ -219,9 +222,29 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
...
@@ -219,9 +222,29 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
if
(
flags
==
_CACHE_UNCACHED
)
if
(
flags
==
_CACHE_UNCACHED
)
base
=
(
u64
)
IO_BASE
;
base
=
(
u64
)
IO_BASE
;
return
(
void
__iomem
*
)
(
unsigned
long
)
(
base
+
offset
);
return
(
void
__iomem
*
)
(
unsigned
long
)
(
base
+
offset
);
}
else
if
(
__builtin_constant_p
(
offset
)
&&
__builtin_constant_p
(
size
)
&&
__builtin_constant_p
(
flags
))
{
phys_t
phys_addr
,
last_addr
;
phys_addr
=
fixup_bigphys_addr
(
offset
,
size
);
/* Don't allow wraparound or zero size. */
last_addr
=
phys_addr
+
size
-
1
;
if
(
!
size
||
last_addr
<
phys_addr
)
return
NULL
;
/*
* Map uncached objects in the low 512MB of address
* space using KSEG1.
*/
if
(
__IS_LOW512
(
phys_addr
)
&&
__IS_LOW512
(
last_addr
)
&&
flags
==
_CACHE_UNCACHED
)
return
(
void
__iomem
*
)
CKSEG1ADDR
(
phys_addr
);
}
}
return
__ioremap
(
offset
,
size
,
flags
);
return
__ioremap
(
offset
,
size
,
flags
);
#undef __IS_LOW512
}
}
/*
/*
...
@@ -273,12 +296,16 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
...
@@ -273,12 +296,16 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
static
inline
void
iounmap
(
volatile
void
__iomem
*
addr
)
static
inline
void
iounmap
(
volatile
void
__iomem
*
addr
)
{
{
if
(
cpu_has_64bit_addresses
)
#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
if
(
cpu_has_64bit_addresses
||
(
__builtin_constant_p
(
addr
)
&&
__IS_KSEG1
(
addr
)))
return
;
return
;
__iounmap
(
addr
);
__iounmap
(
addr
);
}
#undef __IS_KSEG1
}
#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \
#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \
\
\
...
...
include/asm-mips/mach-au1x00/ioremap.h
0 → 100644
View file @
c3455b0e
/*
* include/asm-mips/mach-au1x00/ioremap.h
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_MACH_AU1X00_IOREMAP_H
#define __ASM_MACH_AU1X00_IOREMAP_H
#include <linux/config.h>
#include <linux/types.h>
#ifndef CONFIG_64BIT_PHYS_ADDR
static
inline
phys_t
__fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
{
return
phys_addr
;
}
#endif
/*
* Allow physical addresses to be fixed up to help 36-bit peripherals.
*/
static
inline
phys_t
fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
{
return
__fixup_bigphys_addr
(
phys_addr
,
size
);
}
#endif
/* __ASM_MACH_AU1X00_IOREMAP_H */
include/asm-mips/mach-generic/ioremap.h
0 → 100644
View file @
c3455b0e
/*
* include/asm-mips/mach-generic/ioremap.h
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_MACH_GENERIC_IOREMAP_H
#define __ASM_MACH_GENERIC_IOREMAP_H
#include <linux/types.h>
/*
* Allow physical addresses to be fixed up to help peripherals located
* outside the low 32-bit range -- generic pass-through version.
*/
static
inline
phys_t
fixup_bigphys_addr
(
phys_t
phys_addr
,
phys_t
size
)
{
return
phys_addr
;
}
#endif
/* __ASM_MACH_GENERIC_IOREMAP_H */
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