Commit c3510fec authored by Pascal van Leeuwen's avatar Pascal van Leeuwen Committed by Herbert Xu

crypto: inside-secure - Fix hangup during probing for EIP97 engine

Fixed mask used for CFSIZE and RFSIZE fields of HIA_OPTIONS register,
these were all 1 bit too wide. Which caused the probing of a standard
EIP97 to actually hang due to assume way too large descriptor FIFO's.
Signed-off-by: default avatarPascal van Leeuwen <pvanleeuwen@verimatrix.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 6d01d851
...@@ -257,13 +257,13 @@ ...@@ -257,13 +257,13 @@
#define EIP197_CFSIZE_OFFSET 9 #define EIP197_CFSIZE_OFFSET 9
#define EIP197_CFSIZE_ADJUST 4 #define EIP197_CFSIZE_ADJUST 4
#define EIP97_CFSIZE_OFFSET 8 #define EIP97_CFSIZE_OFFSET 8
#define EIP197_CFSIZE_MASK GENMASK(3, 0) #define EIP197_CFSIZE_MASK GENMASK(2, 0)
#define EIP97_CFSIZE_MASK GENMASK(4, 0) #define EIP97_CFSIZE_MASK GENMASK(3, 0)
#define EIP197_RFSIZE_OFFSET 12 #define EIP197_RFSIZE_OFFSET 12
#define EIP197_RFSIZE_ADJUST 4 #define EIP197_RFSIZE_ADJUST 4
#define EIP97_RFSIZE_OFFSET 12 #define EIP97_RFSIZE_OFFSET 12
#define EIP197_RFSIZE_MASK GENMASK(3, 0) #define EIP197_RFSIZE_MASK GENMASK(2, 0)
#define EIP97_RFSIZE_MASK GENMASK(4, 0) #define EIP97_RFSIZE_MASK GENMASK(3, 0)
/* EIP197_HIA_AIC_R_ENABLE_CTRL */ /* EIP197_HIA_AIC_R_ENABLE_CTRL */
#define EIP197_CDR_IRQ(n) BIT((n) * 2) #define EIP197_CDR_IRQ(n) BIT((n) * 2)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment