arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY

The PCIe node is wired to the second PHY of the COMPHY IP.
Suggested-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts

@@ -46,6 +46,7 @@ vcc_sd_reg1: regulator {
 /* J9 */
 &pcie0 {
 	status = "okay";
+	phys = <&comphy1 0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
 };