Commit c397b908 authored by Daniel Vetter's avatar Daniel Vetter Committed by Dave Airlie

drm/i915: embed the gem object into drm_i915_gem_object

Just embed it and adjust the pointers, No other changes (that's
for later patches).
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent ac52bc56
......@@ -647,6 +647,7 @@ typedef struct drm_i915_private {
/** driver private structure attached to each drm_gem_object */
struct drm_i915_gem_object {
struct drm_gem_object base;
struct drm_gem_object *obj;
/** Current space allocated to this object in the GTT, if any. */
......
......@@ -4424,37 +4424,38 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
struct drm_gem_object * i915_gem_alloc_object(struct drm_device *dev,
size_t size)
{
return drm_gem_object_alloc(dev, size);
}
struct drm_i915_gem_object *obj;
int i915_gem_init_object(struct drm_gem_object *obj)
{
struct drm_i915_gem_object *obj_priv;
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
if (obj == NULL)
return NULL;
obj_priv = kzalloc(sizeof(*obj_priv), GFP_KERNEL);
if (obj_priv == NULL)
return -ENOMEM;
if (drm_gem_object_init(dev, &obj->base, size) != 0) {
kfree(obj);
return NULL;
}
/*
* We've just allocated pages from the kernel,
* so they've just been written by the CPU with
* zeros. They'll need to be clflushed before we
* use them with the GPU.
*/
obj->write_domain = I915_GEM_DOMAIN_CPU;
obj->read_domains = I915_GEM_DOMAIN_CPU;
obj->base.write_domain = I915_GEM_DOMAIN_CPU;
obj->base.read_domains = I915_GEM_DOMAIN_CPU;
obj_priv->agp_type = AGP_USER_MEMORY;
obj->agp_type = AGP_USER_MEMORY;
obj->driver_private = obj_priv;
obj_priv->obj = obj;
obj_priv->fence_reg = I915_FENCE_REG_NONE;
INIT_LIST_HEAD(&obj_priv->list);
INIT_LIST_HEAD(&obj_priv->gpu_write_list);
INIT_LIST_HEAD(&obj_priv->fence_list);
obj_priv->madv = I915_MADV_WILLNEED;
obj->base.driver_private = obj;
obj->obj = &obj->base;
obj->fence_reg = I915_FENCE_REG_NONE;
INIT_LIST_HEAD(&obj->list);
INIT_LIST_HEAD(&obj->gpu_write_list);
INIT_LIST_HEAD(&obj->fence_list);
obj->madv = I915_MADV_WILLNEED;
trace_i915_gem_object_create(obj);
trace_i915_gem_object_create(&obj->base);
return &obj->base;
}
int i915_gem_init_object(struct drm_gem_object *obj)
{
BUG();
return 0;
}
......@@ -4477,12 +4478,11 @@ void i915_gem_free_object(struct drm_gem_object *obj)
if (obj_priv->mmap_offset)
i915_gem_free_mmap_offset(obj);
drm_gem_object_release(obj);
kfree(obj_priv->page_cpu_valid);
kfree(obj_priv->bit_17);
kfree(obj->driver_private);
drm_gem_object_release(obj);
kfree(obj);
kfree(obj_priv);
}
/** Unbinds all inactive objects. */
......
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