Commit c40aa471 authored by Jeremy Kerr's avatar Jeremy Kerr Committed by Paul Mackerras

[POWERPC] spufs: fix incorrect interrupt status clearing in backing mbox stat poll

When doing a poll on the mbox stat file of a swapped-out context, we
clear the class 0 interrupt status, rather than the class 2 interrupt
status.

This change corrects the poll operation to clear the correct interrupt.
Signed-off-by: default avatarJeremy Kerr <jk@ozlabs.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent cc210b3e
...@@ -106,7 +106,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx, ...@@ -106,7 +106,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0xff0000) if (stat & 0xff0000)
ret |= POLLIN | POLLRDNORM; ret |= POLLIN | POLLRDNORM;
else { else {
ctx->csa.priv1.int_stat_class0_RW &= ~0x1; ctx->csa.priv1.int_stat_class2_RW &= ~0x1;
ctx->csa.priv1.int_mask_class2_RW |= 0x1; ctx->csa.priv1.int_mask_class2_RW |= 0x1;
} }
} }
...@@ -114,7 +114,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx, ...@@ -114,7 +114,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0x00ff00) if (stat & 0x00ff00)
ret = POLLOUT | POLLWRNORM; ret = POLLOUT | POLLWRNORM;
else { else {
ctx->csa.priv1.int_stat_class0_RW &= ~0x10; ctx->csa.priv1.int_stat_class2_RW &= ~0x10;
ctx->csa.priv1.int_mask_class2_RW |= 0x10; ctx->csa.priv1.int_mask_class2_RW |= 0x10;
} }
} }
......
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