Commit c40bc54f authored by Gary Bisson's avatar Gary Bisson Committed by Shawn Guo

ARM: dts: imx6qdl-nitrogen6_som2: fix PCIe reset

Previous value was a bad copy of nitrogen6_max device tree.
Signed-off-by: default avatarGary Bisson <gary.bisson@boundarydevices.com>
Fixes: 3faa1bb2 ("ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 83175620
...@@ -507,7 +507,7 @@ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 ...@@ -507,7 +507,7 @@ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
pinctrl_pcie: pciegrp { pinctrl_pcie: pciegrp {
fsl,pins = < fsl,pins = <
/* PCIe reset */ /* PCIe reset */
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0
>; >;
}; };
...@@ -668,7 +668,7 @@ lvds1_out: endpoint { ...@@ -668,7 +668,7 @@ lvds1_out: endpoint {
&pcie { &pcie {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>; pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>; reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
......
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