Commit c43b849f authored by Andrey Grodzovsky's avatar Andrey Grodzovsky Committed by Alex Deucher

drm/amdgpu: Use new mode2 reset interface for RV.

Integrate the mode2 reset into rest sequence.

v2:
Check ppfuncs pointer for NULL
Signed-off-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e97204ea
...@@ -3525,6 +3525,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev) ...@@ -3525,6 +3525,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
case CHIP_VEGA20: case CHIP_VEGA20:
case CHIP_VEGA10: case CHIP_VEGA10:
case CHIP_VEGA12: case CHIP_VEGA12:
case CHIP_RAVEN:
break; break;
default: default:
goto disabled; goto disabled;
......
...@@ -509,6 +509,15 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev) ...@@ -509,6 +509,15 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
return 0; return 0;
} }
static int soc15_mode2_reset(struct amdgpu_device *adev)
{
if (!adev->powerplay.pp_funcs ||
!adev->powerplay.pp_funcs->asic_reset_mode_2)
return -ENOENT;
return adev->powerplay.pp_funcs->asic_reset_mode_2(adev->powerplay.pp_handle);
}
static enum amd_reset_method static enum amd_reset_method
soc15_asic_reset_method(struct amdgpu_device *adev) soc15_asic_reset_method(struct amdgpu_device *adev)
{ {
...@@ -547,14 +556,14 @@ soc15_asic_reset_method(struct amdgpu_device *adev) ...@@ -547,14 +556,14 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
static int soc15_asic_reset(struct amdgpu_device *adev) static int soc15_asic_reset(struct amdgpu_device *adev)
{ {
int ret; switch (soc15_asic_reset_method(adev)) {
case AMD_RESET_METHOD_BACO:
if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) return soc15_asic_baco_reset(adev);
ret = soc15_asic_baco_reset(adev); case AMD_RESET_METHOD_MODE2:
else return soc15_mode2_reset(adev);
ret = soc15_asic_mode1_reset(adev); default:
return soc15_asic_mode1_reset(adev);
return ret; }
} }
/*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock, /*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
......
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