Commit c531fb27 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: shmobile: timer: Fix preset_lpj leading to too short delays

On all shmobile ARM SoCs, loop-based delays may complete early, which
can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the
minimum required time.

This is caused by calculating preset_lpj based on incorrect assumptions
about the number of clock cycles per loop:
  - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per
    CPU clock cycle,
  - As of commit 11d4bb1b ("ARM: 7907/1: lib: delay-loop: Add
    align directive to fix BogoMIPS calculation"), Cortex A8 runs
    __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles.

On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as
delays use the ARM arch timer if available. R-Car Gen2 doesn't work if
the arch timer is disabled. However, APE6 can be used without the arch
timer.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 01638a7f
...@@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz, ...@@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
void __init shmobile_init_delay(void) void __init shmobile_init_delay(void)
{ {
struct device_node *np, *cpus; struct device_node *np, *cpus;
bool is_a7_a8_a9 = false; unsigned int div = 0;
bool is_a15 = false;
bool has_arch_timer = false; bool has_arch_timer = false;
u32 max_freq = 0; u32 max_freq = 0;
...@@ -55,27 +54,22 @@ void __init shmobile_init_delay(void) ...@@ -55,27 +54,22 @@ void __init shmobile_init_delay(void)
if (!of_property_read_u32(np, "clock-frequency", &freq)) if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq); max_freq = max(max_freq, freq);
if (of_device_is_compatible(np, "arm,cortex-a8") || if (of_device_is_compatible(np, "arm,cortex-a8")) {
of_device_is_compatible(np, "arm,cortex-a9")) { div = 2;
is_a7_a8_a9 = true; } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
} else if (of_device_is_compatible(np, "arm,cortex-a7")) { div = 1;
is_a7_a8_a9 = true; } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
has_arch_timer = true; of_device_is_compatible(np, "arm,cortex-a15")) {
} else if (of_device_is_compatible(np, "arm,cortex-a15")) { div = 1;
is_a15 = true;
has_arch_timer = true; has_arch_timer = true;
} }
} }
of_node_put(cpus); of_node_put(cpus);
if (!max_freq) if (!max_freq || !div)
return; return;
if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) { if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
if (is_a7_a8_a9) shmobile_setup_delay_hz(max_freq, 1, div);
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (is_a15)
shmobile_setup_delay_hz(max_freq, 2, 4);
}
} }
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