Commit c6f54a9b authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Russell King

ARM: 8113/1: remove remaining definitions of PLAT_PHYS_OFFSET from <mach/memory.h>

The platforms selecting NEED_MACH_MEMORY_H defined the start address of
their physical memory in the respective <mach/memory.h>. With
ARM_PATCH_PHYS_VIRT=y (which is quite common today) this is useless
though because the definition isn't used but determined dynamically.

So remove the definitions from all <mach/memory.h> and provide the
Kconfig symbol PHYS_OFFSET with the respective defaults in case
ARM_PATCH_PHYS_VIRT isn't enabled.

This allows to drop the dependency of PHYS_OFFSET on !NEED_MACH_MEMORY_H
which prevents compiling an integrator nommu-kernel.
(CONFIG_PAGE_OFFSET which has "default PHYS_OFFSET if !MMU" expanded to
"0x" because CONFIG_PHYS_OFFSET doesn't exist as INTEGRATOR selects
NEED_MACH_MEMORY_H.)
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 04fcab32
...@@ -262,8 +262,22 @@ config NEED_MACH_MEMORY_H ...@@ -262,8 +262,22 @@ config NEED_MACH_MEMORY_H
config PHYS_OFFSET config PHYS_OFFSET
hex "Physical address of main memory" if MMU hex "Physical address of main memory" if MMU
depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H depends on !ARM_PATCH_PHYS_VIRT
default DRAM_BASE if !MMU default DRAM_BASE if !MMU
default 0x00000000 if ARCH_EBSA110 || \
EP93XX_SDCE3_SYNC_PHYS_OFFSET || \
ARCH_FOOTBRIDGE || \
ARCH_INTEGRATOR || \
ARCH_IOP13XX || \
ARCH_KS8695 || \
(ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
default 0x20000000 if ARCH_S5PV210
default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
default 0xc0000000 if EP93XX_SDCE0_PHYS_OFFSET || ARCH_SA1100
default 0xd0000000 if EP93XX_SDCE1_PHYS_OFFSET
default 0xe0000000 if EP93XX_SDCE2_PHYS_OFFSET
default 0xf0000000 if EP93XX_SDCE3_ASYNC_PHYS_OFFSET
help help
Please provide the physical address corresponding to the Please provide the physical address corresponding to the
location of main memory in your system. location of main memory in your system.
...@@ -435,7 +449,6 @@ config ARCH_EP93XX ...@@ -435,7 +449,6 @@ config ARCH_EP93XX
select ARM_VIC select ARM_VIC
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CPU_ARM920T select CPU_ARM920T
select NEED_MACH_MEMORY_H
help help
This enables support for the Cirrus EP93xx series of CPUs. This enables support for the Cirrus EP93xx series of CPUs.
......
...@@ -150,13 +150,11 @@ ...@@ -150,13 +150,11 @@
/* /*
* PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
* memory. This is used for XIP and NoMMU kernels, or by kernels which * memory. This is used for XIP and NoMMU kernels, and on platforms that don't
* have their own mach/memory.h. Assembly code must always use * have CONFIG_ARM_PATCH_PHYS_VIRT. Assembly code must always use
* PLAT_PHYS_OFFSET and not PHYS_OFFSET. * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
*/ */
#ifndef PLAT_PHYS_OFFSET
#define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) #define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
#endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
......
...@@ -16,11 +16,6 @@ ...@@ -16,11 +16,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
/* /*
* Cache flushing area - SRAM * Cache flushing area - SRAM
*/ */
......
/*
* arch/arm/mach-ep93xx/include/mach/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#if defined(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
#define PLAT_PHYS_OFFSET UL(0xd0000000)
#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
#define PLAT_PHYS_OFFSET UL(0xe0000000)
#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
#define PLAT_PHYS_OFFSET UL(0xf0000000)
#else
#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
#endif
#endif
...@@ -59,11 +59,6 @@ extern unsigned long __bus_to_pfn(unsigned long); ...@@ -59,11 +59,6 @@ extern unsigned long __bus_to_pfn(unsigned long);
*/ */
#define FLUSH_BASE 0xf9000000 #define FLUSH_BASE 0xf9000000
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define FLUSH_BASE_PHYS 0x50000000 #define FLUSH_BASE_PHYS 0x50000000
#endif #endif
...@@ -20,11 +20,6 @@ ...@@ -20,11 +20,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x80000000) #define BUS_OFFSET UL(0x80000000)
#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET) #define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
#define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET) #define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET)
......
...@@ -3,11 +3,6 @@ ...@@ -3,11 +3,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#if defined(CONFIG_ARCH_IOP13XX) #if defined(CONFIG_ARCH_IOP13XX)
......
...@@ -15,11 +15,6 @@ ...@@ -15,11 +15,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
/*
* Physical SRAM offset.
*/
#define PLAT_PHYS_OFFSET KS8695_SDRAM_PA
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
......
...@@ -5,11 +5,6 @@ ...@@ -5,11 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x10000000)
/* /*
* Bus address is physical address, except for OMAP-1510 Local Bus. * Bus address is physical address, except for OMAP-1510 Local Bus.
* OMAP-1510 bus address is translated into a Local Bus address if the * OMAP-1510 bus address is translated into a Local Bus address if the
......
...@@ -20,15 +20,6 @@ ...@@ -20,15 +20,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
#define PLAT_PHYS_OFFSET UL(0x70000000)
#else
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
#ifdef CONFIG_SPARSEMEM #ifdef CONFIG_SPARSEMEM
/* /*
......
...@@ -18,11 +18,6 @@ ...@@ -18,11 +18,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x10000000)
/* /*
* Cache flushing area - ROM * Cache flushing area - ROM
*/ */
......
...@@ -13,8 +13,6 @@ ...@@ -13,8 +13,6 @@
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x20000000)
/* /*
* Sparsemem support * Sparsemem support
* Physical memory can be located from 0x20000000 to 0x7fffffff, * Physical memory can be located from 0x20000000 to 0x7fffffff,
......
...@@ -9,11 +9,6 @@ ...@@ -9,11 +9,6 @@
#include <asm/sizes.h> #include <asm/sizes.h>
/*
* Physical DRAM offset is 0xc0000000 on the SA1100
*/
#define PLAT_PHYS_OFFSET UL(0xc0000000)
/* /*
* Because of the wide memory address space between physical RAM banks on the * Because of the wide memory address space between physical RAM banks on the
* SA1100, it's much convenient to use Linux's SparseMEM support to implement * SA1100, it's much convenient to use Linux's SparseMEM support to implement
......
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