Commit c72757b4 authored by James Simmons's avatar James Simmons

Voodoo 1 ported to new api. STI and NVIDIA updates. MDA console fixes. Moved...

Voodoo 1 ported to new api. STI and NVIDIA updates. MDA console fixes. Moved the logo code from fbcon to fbdev.
parent c198ff87
...@@ -130,7 +130,7 @@ extern void console_map_init(void); ...@@ -130,7 +130,7 @@ extern void console_map_init(void);
extern void prom_con_init(void); extern void prom_con_init(void);
#endif #endif
#ifdef CONFIG_MDA_CONSOLE #ifdef CONFIG_MDA_CONSOLE
extern void mda_console_init(void); extern int mda_console_init(void);
#endif #endif
#ifdef CONFIG_FRAMEBUFFER_CONSOLE #ifdef CONFIG_FRAMEBUFFER_CONSOLE
extern int fb_console_init(void); extern int fb_console_init(void);
......
...@@ -84,7 +84,7 @@ obj-$(CONFIG_FB_VIRTUAL) += vfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt ...@@ -84,7 +84,7 @@ obj-$(CONFIG_FB_VIRTUAL) += vfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt
obj-$(CONFIG_FB_HIT) += hitfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_HIT) += hitfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
obj-$(CONFIG_FB_E1355) += epson1355fb.o obj-$(CONFIG_FB_E1355) += epson1355fb.o
obj-$(CONFIG_FB_PVR2) += pvr2fb.o obj-$(CONFIG_FB_PVR2) += pvr2fb.o
obj-$(CONFIG_FB_VOODOO1) += sstfb.o obj-$(CONFIG_FB_VOODOO1) += sstfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o
# Files generated that shall be removed upon make clean # Files generated that shall be removed upon make clean
clean-files := promcon_tbl.c clean-files := promcon_tbl.c
......
...@@ -56,8 +56,6 @@ ...@@ -56,8 +56,6 @@
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <linux/fb.h> #include <linux/fb.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/selection.h>
#include <linux/console.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <asm/io.h> #include <asm/io.h>
......
...@@ -102,10 +102,9 @@ static inline void color_imageblit(struct fb_image *image, struct fb_info *p, u8 ...@@ -102,10 +102,9 @@ static inline void color_imageblit(struct fb_image *image, struct fb_info *p, u8
unsigned long start_index, unsigned long pitch_index) unsigned long start_index, unsigned long pitch_index)
{ {
/* Draw the penguin */ /* Draw the penguin */
int i, n;
int bpp = p->var.bits_per_pixel;
unsigned long *palette = (unsigned long *) p->pseudo_palette; unsigned long *palette = (unsigned long *) p->pseudo_palette;
unsigned long *dst, *dst2, color = 0, val, shift; unsigned long *dst, *dst2, color = 0, val, shift;
int i, n, bpp = p->var.bits_per_pixel;
unsigned long null_bits = BITS_PER_LONG - bpp; unsigned long null_bits = BITS_PER_LONG - bpp;
u8 *src = image->data; u8 *src = image->data;
...@@ -189,6 +188,7 @@ static inline void slow_imageblit(struct fb_image *image, struct fb_info *p, u8 ...@@ -189,6 +188,7 @@ static inline void slow_imageblit(struct fb_image *image, struct fb_info *p, u8
color = fgcolor; color = fgcolor;
else else
color = bgcolor; color = bgcolor;
color <<= LEFT_POS(bpp);
val |= SHIFT_HIGH(color, shift); val |= SHIFT_HIGH(color, shift);
/* Did the bitshift spill bits to the next long? */ /* Did the bitshift spill bits to the next long? */
......
...@@ -74,6 +74,22 @@ config STI_CONSOLE ...@@ -74,6 +74,22 @@ config STI_CONSOLE
machines. Say Y here to build support for it into your kernel. machines. Say Y here to build support for it into your kernel.
The alternative is to use your primary serial port as a console. The alternative is to use your primary serial port as a console.
config DUMMY_CONSOLE_COLUMNS
int "Initial number of STI console screen columns" if STI_CONSOLE
depends on STI_CONSOLE || FB_STI
default "160"
help
The default value is 160, which should fit a 1280x1024 monitor.
Select 80 if you use a 640x480 resolution by default.
config DUMMY_CONSOLE_ROWS
int "Initial number of STI console screen rows" if STI_CONSOLE
depends on STI_CONSOLE || FB_STI
default "64"
help
The default value is 64, which should fit a 1280x1024 monitor.
Select 25 if you use a 640x480 resolution by default.
config PROM_CONSOLE config PROM_CONSOLE
bool "PROM console" bool "PROM console"
depends on SPARC32 || SPARC64 depends on SPARC32 || SPARC64
...@@ -121,10 +137,6 @@ config FBCON_ADVANCED ...@@ -121,10 +137,6 @@ config FBCON_ADVANCED
If unsure, say N. If unsure, say N.
# Guess what we need # Guess what we need
config FBCON_STI
tristate
depends on !FBCON_ADVANCED && FRAMEBUFFER_CONSOLE && FB_STI
default y
config FONTWIDTH8_ONLY config FONTWIDTH8_ONLY
bool "Support only 8 pixels wide fonts" bool "Support only 8 pixels wide fonts"
......
...@@ -20,8 +20,10 @@ ...@@ -20,8 +20,10 @@
#define DUMMY_COLUMNS ORIG_VIDEO_COLS #define DUMMY_COLUMNS ORIG_VIDEO_COLS
#define DUMMY_ROWS ORIG_VIDEO_LINES #define DUMMY_ROWS ORIG_VIDEO_LINES
#elif defined(__hppa__) #elif defined(__hppa__)
#define DUMMY_COLUMNS 80 /* fixme ! (mine uses 160x64 at 1280x1024) */ /* set by Kconfig. Use 80x25 for 640x480 and 160x64 for 1280x1024 */
#define DUMMY_ROWS 25 #include <linux/config.h>
#define DUMMY_COLUMNS CONFIG_DUMMY_CONSOLE_COLUMNS
#define DUMMY_ROWS CONFIG_DUMMY_CONSOLE_ROWS
#else #else
#define DUMMY_COLUMNS 80 #define DUMMY_COLUMNS 80
#define DUMMY_ROWS 25 #define DUMMY_ROWS 25
......
...@@ -93,8 +93,6 @@ ...@@ -93,8 +93,6 @@
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/setup.h> #include <asm/setup.h>
#endif #endif
#define INCLUDE_LINUX_LOGO_DATA
#include <asm/linux_logo.h>
#include "fbcon.h" #include "fbcon.h"
#include "font.h" #include "font.h"
...@@ -203,8 +201,6 @@ static __inline__ void ypan_down(struct display *p, struct vc_data *vc, ...@@ -203,8 +201,6 @@ static __inline__ void ypan_down(struct display *p, struct vc_data *vc,
static void fbcon_bmove_rec(struct display *p, int sy, int sx, int dy, static void fbcon_bmove_rec(struct display *p, int sy, int sx, int dy,
int dx, int height, int width, u_int y_break); int dx, int height, int width, u_int y_break);
static int fbcon_show_logo(void);
#ifdef CONFIG_MAC #ifdef CONFIG_MAC
/* /*
* On the Macintoy, there may or may not be a working VBL int. We need to probe * On the Macintoy, there may or may not be a working VBL int. We need to probe
...@@ -1945,7 +1941,7 @@ static int fbcon_switch(struct vc_data *vc) ...@@ -1945,7 +1941,7 @@ static int fbcon_switch(struct vc_data *vc)
accel_clear_margins(vc, p, 0); accel_clear_margins(vc, p, 0);
if (logo_shown == -2) { if (logo_shown == -2) {
logo_shown = fg_console; logo_shown = fg_console;
fbcon_show_logo(); /* This is protected above by initmem_freed */ fb_show_logo(info); /* This is protected above by initmem_freed */
update_region(fg_console, update_region(fg_console,
vc->vc_origin + vc->vc_size_row * vc->vc_top, vc->vc_origin + vc->vc_size_row * vc->vc_top,
vc->vc_size_row * (vc->vc_bottom - vc->vc_size_row * (vc->vc_bottom -
...@@ -2347,8 +2343,7 @@ static struct fb_cmap palette_cmap = { ...@@ -2347,8 +2343,7 @@ static struct fb_cmap palette_cmap = {
static int fbcon_set_palette(struct vc_data *vc, unsigned char *table) static int fbcon_set_palette(struct vc_data *vc, unsigned char *table)
{ {
int unit = vc->vc_num; struct display *p = &fb_display[vc->vc_num];
struct display *p = &fb_display[unit];
struct fb_info *info = p->fb_info; struct fb_info *info = p->fb_info;
int i, j, k; int i, j, k;
u8 val; u8 val;
...@@ -2548,253 +2543,6 @@ static int fbcon_set_origin(struct vc_data *vc) ...@@ -2548,253 +2543,6 @@ static int fbcon_set_origin(struct vc_data *vc)
return 0; return 0;
} }
static inline unsigned safe_shift(unsigned d, int n)
{
return n < 0 ? d >> -n : d << n;
}
static void __init fbcon_set_logocmap(struct fb_info *info)
{
int i, j, n;
for (i = 0; i < LINUX_LOGO_COLORS; i += n) {
n = LINUX_LOGO_COLORS - i;
if (n > 16)
/* palette_cmap provides space for only 16 colors at once */
n = 16;
palette_cmap.start = 32 + i;
palette_cmap.len = n;
for (j = 0; j < n; ++j) {
palette_cmap.red[j] =
(linux_logo_red[i + j] << 8) |
linux_logo_red[i + j];
palette_cmap.green[j] =
(linux_logo_green[i + j] << 8) |
linux_logo_green[i + j];
palette_cmap.blue[j] =
(linux_logo_blue[i + j] << 8) |
linux_logo_blue[i + j];
}
fb_set_cmap(&palette_cmap, 1, info);
}
}
static void __init fbcon_set_logo_truepalette(struct fb_info *info, u32 *palette)
{
unsigned char mask[9] = { 0,0x80,0xc0,0xe0,0xf0,0xf8,0xfc,0xfe,0xff };
unsigned char redmask, greenmask, bluemask;
int redshift, greenshift, blueshift;
int i;
/*
* We have to create a temporary palette since console palette is only
* 16 colors long.
*/
/* Bug: Doesn't obey msb_right ... (who needs that?) */
redmask = mask[info->var.red.length < 8 ? info->var.red.length : 8];
greenmask = mask[info->var.green.length < 8 ? info->var.green.length : 8];
bluemask = mask[info->var.blue.length < 8 ? info->var.blue.length : 8];
redshift = info->var.red.offset - (8 - info->var.red.length);
greenshift = info->var.green.offset - (8 - info->var.green.length);
blueshift = info->var.blue.offset - (8 - info->var.blue.length);
for ( i = 0; i < LINUX_LOGO_COLORS; i++) {
palette[i+32] = (safe_shift((linux_logo_red[i] & redmask), redshift) |
safe_shift((linux_logo_green[i] & greenmask), greenshift) |
safe_shift((linux_logo_blue[i] & bluemask), blueshift));
}
}
static void __init fbcon_set_logo_directpalette(struct fb_info *info, u32 *palette)
{
int redshift, greenshift, blueshift;
int i;
redshift = info->var.red.offset;
greenshift = info->var.green.offset;
blueshift = info->var.blue.offset;
for (i = 32; i < LINUX_LOGO_COLORS; i++)
palette[i] = i << redshift | i << greenshift | i << blueshift;
}
static void __init fbcon_set_logo(struct fb_info *info, u8 *logo, int needs_logo)
{
int i, j;
switch (needs_logo) {
case 4:
for (i = 0; i < (LOGO_W * LOGO_H)/2; i++) {
logo[i*2] = linux_logo16[i] >> 4;
logo[(i*2)+1] = linux_logo16[i] & 0xf;
}
break;
case 1:
case ~1:
default:
for (i = 0; i < (LOGO_W * LOGO_H)/8; i++)
for (j = 0; j < 8; j++)
logo[i*8 + j] = (linux_logo_bw[i] & (7 - j)) ?
((needs_logo == 1) ? 1 : 0) :
((needs_logo == 1) ? 0 : 1);
break;
}
}
/*
* Three (3) kinds of logo maps exist. linux_logo (>16 colors), linux_logo_16
* (16 colors) and linux_logo_bw (2 colors). Depending on the visual format and
* color depth of the framebuffer, the DAC, the pseudo_palette, and the logo data
* will be adjusted accordingly.
*
* Case 1 - linux_logo:
* Color exceeds the number of console colors (16), thus we set the hardware DAC
* using fb_set_cmap() appropriately. The "needs_cmapreset" flag will be set.
*
* For visuals that require color info from the pseudo_palette, we also construct
* one for temporary use. The "needs_directpalette" or "needs_truepalette" flags
* will be set.
*
* Case 2 - linux_logo_16:
* The number of colors just matches the console colors, thus there is no need
* to set the DAC or the pseudo_palette. However, the bitmap is packed, ie,
* each byte contains color information for two pixels (upper and lower nibble).
* To be consistent with fb_imageblit() usage, we therefore separate the two
* nibbles into separate bytes. The "needs_logo" flag will be set to 4.
*
* Case 3 - linux_logo_bw:
* This is similar with Case 2. Each byte contains information for 8 pixels.
* We isolate each bit and expand each into a byte. The "needs_logo" flag will
* be set to 1.
*/
static int __init fbcon_show_logo(void)
{
struct display *p = &fb_display[fg_console]; /* draw to vt in foreground */
struct fb_info *info = p->fb_info;
struct vc_data *vc = info->display_fg;
struct fb_image image;
u32 *palette = NULL, *saved_palette = NULL;
unsigned char *fb = info->screen_base, *logo_new = NULL;
int done = 0, x;
int needs_cmapreset = 0;
int needs_truepalette = 0;
int needs_directpalette = 0;
int needs_logo = 0;
/* Return if the frame buffer is not mapped */
if (!fb || !info->fbops->fb_imageblit)
return 0;
image.depth = info->var.bits_per_pixel;
/* reasonable default */
if (image.depth >= 8)
image.data = linux_logo;
else if (image.depth >= 4)
image.data = linux_logo16;
else
image.data = linux_logo_bw;
switch (info->fix.visual) {
case FB_VISUAL_TRUECOLOR:
needs_truepalette = 1;
if (image.depth >= 4 && image.depth <= 8)
needs_logo = 4;
else if (image.depth < 4)
needs_logo = 1;
break;
case FB_VISUAL_DIRECTCOLOR:
if (image.depth >= 24) {
needs_directpalette = 1;
needs_cmapreset = 1;
}
/* 16 colors */
else if (image.depth >= 16)
needs_logo = 4;
/* 2 colors */
else
needs_logo = 1;
break;
case FB_VISUAL_MONO01:
/* reversed 0 = fg, 1 = bg */
needs_logo = ~1;
break;
case FB_VISUAL_MONO10:
needs_logo = 1;
break;
case FB_VISUAL_PSEUDOCOLOR:
default:
if (image.depth >= 8)
needs_cmapreset = 1;
/* fall through */
case FB_VISUAL_STATIC_PSEUDOCOLOR:
/* 16 colors */
if (image.depth >= 4 && image.depth < 8)
needs_logo = 4;
/* 2 colors */
else if (image.depth < 4)
needs_logo = 1;
break;
}
if (needs_cmapreset)
fbcon_set_logocmap(info);
if (needs_truepalette || needs_directpalette) {
palette = kmalloc(256 * 4, GFP_KERNEL);
if (palette == NULL)
return 1;
if (needs_truepalette)
fbcon_set_logo_truepalette(info, palette);
else
fbcon_set_logo_directpalette(info, palette);
saved_palette = info->pseudo_palette;
info->pseudo_palette = palette;
}
if (needs_logo) {
logo_new = kmalloc(LOGO_W * LOGO_H, GFP_KERNEL);
if (logo_new == NULL) {
if (palette)
kfree(palette);
if (saved_palette)
info->pseudo_palette = saved_palette;
return 1;
}
image.data = logo_new;
fbcon_set_logo(info, logo_new, needs_logo);
}
image.width = LOGO_W;
image.height = LOGO_H;
image.dy = 0;
for (x = 0; x < num_online_cpus() * (LOGO_W + 8) &&
x < info->var.xres - (LOGO_W + 8); x += (LOGO_W + 8)) {
image.dx = x;
info->fbops->fb_imageblit(info, &image);
done = 1;
}
if (palette != NULL)
kfree(palette);
if (saved_palette != NULL)
info->pseudo_palette = saved_palette;
if (logo_new != NULL)
kfree(logo_new);
/*
* Modes not yet supported: packed pixels with depth != 8 (does such a
* thing exist in reality?)
*/
return done ? (LOGO_H + vc->vc_font.height - 1) / vc->vc_font.height : 0;
}
/* /*
* The console `switch' structure for the frame buffer based console * The console `switch' structure for the frame buffer based console
*/ */
......
...@@ -51,8 +51,6 @@ extern struct display fb_display[MAX_NR_CONSOLES]; ...@@ -51,8 +51,6 @@ extern struct display fb_display[MAX_NR_CONSOLES];
extern char con2fb_map[MAX_NR_CONSOLES]; extern char con2fb_map[MAX_NR_CONSOLES];
extern void set_con2fb_map(int unit, int newidx); extern void set_con2fb_map(int unit, int newidx);
#define fontheight(p) ((p)->_fontheight)
#ifdef CONFIG_FONTWIDTH8_ONLY #ifdef CONFIG_FONTWIDTH8_ONLY
/* fontwidth w is supported by dispsw */ /* fontwidth w is supported by dispsw */
...@@ -60,8 +58,6 @@ extern void set_con2fb_map(int unit, int newidx); ...@@ -60,8 +58,6 @@ extern void set_con2fb_map(int unit, int newidx);
/* fontwidths w1-w2 inclusive are supported by dispsw */ /* fontwidths w1-w2 inclusive are supported by dispsw */
#define FONTWIDTHRANGE(w1,w2) FONTWIDTH(8) #define FONTWIDTHRANGE(w1,w2) FONTWIDTH(8)
#define fontwidth(p) (8)
#else #else
/* fontwidth w is supported by dispsw */ /* fontwidth w is supported by dispsw */
...@@ -69,8 +65,6 @@ extern void set_con2fb_map(int unit, int newidx); ...@@ -69,8 +65,6 @@ extern void set_con2fb_map(int unit, int newidx);
/* fontwidths w1-w2 inclusive are supported by dispsw */ /* fontwidths w1-w2 inclusive are supported by dispsw */
#define FONTWIDTHRANGE(w1,w2) (FONTWIDTH(w2+1) - FONTWIDTH(w1)) #define FONTWIDTHRANGE(w1,w2) (FONTWIDTH(w2+1) - FONTWIDTH(w1))
#define fontwidth(p) ((p)->_fontwidth)
#endif #endif
/* /*
......
...@@ -74,7 +74,7 @@ static char *mda_type_name; ...@@ -74,7 +74,7 @@ static char *mda_type_name;
/* console information */ /* console information */
static int mda_first_vc = 13; static int mda_first_vc = 1;
static int mda_last_vc = 16; static int mda_last_vc = 16;
static struct vc_data *mda_display_fg = NULL; static struct vc_data *mda_display_fg = NULL;
...@@ -604,28 +604,22 @@ const struct consw mda_con = { ...@@ -604,28 +604,22 @@ const struct consw mda_con = {
.con_invert_region = mdacon_invert_region, .con_invert_region = mdacon_invert_region,
}; };
void __init mda_console_init(void) int __init mda_console_init(void)
{ {
if (mda_first_vc > mda_last_vc) if (mda_first_vc > mda_last_vc)
return; return 1;
take_over_console(&mda_con, mda_first_vc-1, mda_last_vc-1, 0); take_over_console(&mda_con, mda_first_vc-1, mda_last_vc-1, 0);
}
#ifdef MODULE
MODULE_LICENSE("GPL");
int init_module(void)
{
mda_console_init();
return 0; return 0;
} }
void cleanup_module(void) void __exit mda_console_exit(void)
{ {
give_up_console(&mda_con); give_up_console(&mda_con);
} }
#endif module_init(mda_console_init);
module_exit(mda_console_exit);
MODULE_LICENSE("GPL");
This diff is collapsed.
...@@ -722,9 +722,7 @@ static void riva_load_video_mode(struct fb_info *info) ...@@ -722,9 +722,7 @@ static void riva_load_video_mode(struct fb_info *info)
newmode.ext.interlace = 0xff; /* interlace off */ newmode.ext.interlace = 0xff; /* interlace off */
par->riva.CalcStateExt(&par->riva, &newmode.ext, bpp, width, par->riva.CalcStateExt(&par->riva, &newmode.ext, bpp, width,
hDisplaySize, hDisplay, hStart, hEnd, hDisplaySize, height, dotClock);
hTotal, height, vDisplay, vStart, vEnd,
vTotal, dotClock);
if (par->SecondCRTC) { if (par->SecondCRTC) {
newmode.ext.head = par->riva.PCRTC0[0x00000860/4] & ~0x00001000; newmode.ext.head = par->riva.PCRTC0[0x00000860/4] & ~0x00001000;
newmode.ext.head2 = par->riva.PCRTC0[0x00002860/4] | 0x00001000; newmode.ext.head2 = par->riva.PCRTC0[0x00002860/4] | 0x00001000;
...@@ -1135,7 +1133,7 @@ static int rivafb_cursor(struct fb_info *info, struct fb_cursor *cursor) ...@@ -1135,7 +1133,7 @@ static int rivafb_cursor(struct fb_info *info, struct fb_cursor *cursor)
temp = xx & 0xFFFF; temp = xx & 0xFFFF;
temp |= yy << 16; temp |= yy << 16;
*(par->riva.CURSORPOS) = temp; par->riva.PRAMDAC[0x0000300/4] = temp;
} }
if (flags & FB_CUR_SETSIZE) { if (flags & FB_CUR_SETSIZE) {
...@@ -1263,7 +1261,7 @@ static int rivafb_open(struct fb_info *info, int user) ...@@ -1263,7 +1261,7 @@ static int rivafb_open(struct fb_info *info, int user)
par->state.flags |= VGA_SAVE_CMAP; par->state.flags |= VGA_SAVE_CMAP;
save_vga(&par->state); save_vga(&par->state);
RivaGetConfig(&par->riva); RivaGetConfig(&par->riva, par->Chipset);
CRTCout(par, 0x11, 0xFF); /* vgaHWunlock() + riva unlock (0x7F) */ CRTCout(par, 0x11, 0xFF); /* vgaHWunlock() + riva unlock (0x7F) */
par->riva.LockUnlock(&par->riva, 0); par->riva.LockUnlock(&par->riva, 0);
...@@ -1791,7 +1789,9 @@ static int __devinit rivafb_init_one(struct pci_dev *pd, ...@@ -1791,7 +1789,9 @@ static int __devinit rivafb_init_one(struct pci_dev *pd,
strcat(rivafb_fix.id, rci->name); strcat(rivafb_fix.id, rci->name);
default_par->riva.Architecture = rci->arch_rev; default_par->riva.Architecture = rci->arch_rev;
default_par->riva.Chipset = pd->device;
printk(KERN_INFO PFX "nVidia device/chipset %X\n", pd->device);
rivafb_fix.mmio_len = pci_resource_len(pd, 0); rivafb_fix.mmio_len = pci_resource_len(pd, 0);
rivafb_fix.smem_len = pci_resource_len(pd, 1); rivafb_fix.smem_len = pci_resource_len(pd, 1);
...@@ -1828,11 +1828,9 @@ static int __devinit rivafb_init_one(struct pci_dev *pd, ...@@ -1828,11 +1828,9 @@ static int __devinit rivafb_init_one(struct pci_dev *pd,
0x00000000); 0x00000000);
default_par->riva.FIFO = (unsigned *)(default_par->ctrl_base + default_par->riva.FIFO = (unsigned *)(default_par->ctrl_base +
0x00800000); 0x00800000);
default_par->riva.PCIO = (U008 *)(default_par->ctrl_base + 0x00601000); default_par->riva.PCIO = (U008 *)(default_par->ctrl_base + 0x00601000);
default_par->riva.PDIO = (U008 *)(default_par->ctrl_base + 0x00681000); default_par->riva.PDIO = (U008 *)(default_par->ctrl_base + 0x00681000);
default_par->riva.PVIO = (U008 *)(default_par->ctrl_base + 0x000C0000); default_par->riva.PVIO = (U008 *)(default_par->ctrl_base + 0x000C0000);
default_par->riva.IO = (MISCin(default_par) & 0x01) ? 0x3D0 : 0x3B0; default_par->riva.IO = (MISCin(default_par) & 0x01) ? 0x3D0 : 0x3B0;
if (default_par->riva.Architecture == NV_ARCH_03) { if (default_par->riva.Architecture == NV_ARCH_03) {
......
...@@ -77,25 +77,31 @@ static int nv10Busy ...@@ -77,25 +77,31 @@ static int nv10Busy
{ {
return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01)); return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
} }
static void nv3LockUnlock
static void vgaLockUnlock
( (
RIVA_HW_INST *chip, RIVA_HW_INST *chip,
int Lock int Lock
) )
{ {
VGA_WR08(chip->PVIO, 0x3C4, 0x06); U008 cr11;
VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57); VGA_WR08(chip->PCIO, 0x3D4, 0x11);
cr11 = VGA_RD08(chip->PCIO, 0x3D5);
if(Lock) cr11 |= 0x80;
else cr11 &= ~0x80;
VGA_WR08(chip->PCIO, 0x3D5, cr11);
} }
static void nv4LockUnlock static void nv3LockUnlock
( (
RIVA_HW_INST *chip, RIVA_HW_INST *chip,
int Lock int Lock
) )
{ {
VGA_WR08(chip->PCIO, 0x3D4, 0x1F); VGA_WR08(chip->PVIO, 0x3C4, 0x06);
VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57); VGA_WR08(chip->PVIO, 0x3C5, Lock ? 0x99 : 0x57);
vgaLockUnlock(chip, Lock);
} }
static void nv10LockUnlock static void nv4LockUnlock
( (
RIVA_HW_INST *chip, RIVA_HW_INST *chip,
int Lock int Lock
...@@ -103,6 +109,7 @@ static void nv10LockUnlock ...@@ -103,6 +109,7 @@ static void nv10LockUnlock
{ {
VGA_WR08(chip->PCIO, 0x3D4, 0x1F); VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57); VGA_WR08(chip->PCIO, 0x3D5, Lock ? 0x99 : 0x57);
vgaLockUnlock(chip, Lock);
} }
static int ShowHideCursor static int ShowHideCursor
...@@ -1097,7 +1104,6 @@ static void nv10UpdateArbitrationSettings ...@@ -1097,7 +1104,6 @@ static void nv10UpdateArbitrationSettings
static int CalcVClock static int CalcVClock
( (
int clockIn, int clockIn,
int double_scan,
int *clockOut, int *clockOut,
int *mOut, int *mOut,
int *nOut, int *nOut,
...@@ -1113,18 +1119,16 @@ static int CalcVClock ...@@ -1113,18 +1119,16 @@ static int CalcVClock
DeltaOld = 0xFFFFFFFF; DeltaOld = 0xFFFFFFFF;
VClk = (unsigned)clockIn; VClk = (unsigned)clockIn;
if (double_scan)
VClk *= 2;
if (chip->CrystalFreqKHz == 14318) if (chip->CrystalFreqKHz == 13500)
{ {
lowM = 8; lowM = 7;
highM = 14 - (chip->Architecture == NV_ARCH_03); highM = 13 - (chip->Architecture == NV_ARCH_03);
} }
else else
{ {
lowM = 7; lowM = 8;
highM = 13 - (chip->Architecture == NV_ARCH_03); highM = 14 - (chip->Architecture == NV_ARCH_03);
} }
highP = 4 - (chip->Architecture == NV_ARCH_03); highP = 4 - (chip->Architecture == NV_ARCH_03);
...@@ -1135,8 +1139,9 @@ static int CalcVClock ...@@ -1135,8 +1139,9 @@ static int CalcVClock
{ {
for (M = lowM; M <= highM; M++) for (M = lowM; M <= highM; M++)
{ {
N = (VClk * M / chip->CrystalFreqKHz) << P; N = (VClk << P) * M / chip->CrystalFreqKHz;
Freq = (chip->CrystalFreqKHz * N / M) >> P; if(N <= 255) {
Freq = (chip->CrystalFreqKHz * N / M) >> P;
if (Freq > VClk) if (Freq > VClk)
DeltaNew = Freq - VClk; DeltaNew = Freq - VClk;
else else
...@@ -1152,6 +1157,7 @@ static int CalcVClock ...@@ -1152,6 +1157,7 @@ static int CalcVClock
} }
} }
} }
}
return (DeltaOld != 0xFFFFFFFF); return (DeltaOld != 0xFFFFFFFF);
} }
/* /*
...@@ -1165,15 +1171,7 @@ static void CalcStateExt ...@@ -1165,15 +1171,7 @@ static void CalcStateExt
int bpp, int bpp,
int width, int width,
int hDisplaySize, int hDisplaySize,
int hDisplay,
int hStart,
int hEnd,
int hTotal,
int height, int height,
int vDisplay,
int vStart,
int vEnd,
int vTotal,
int dotClock int dotClock
) )
{ {
...@@ -1188,8 +1186,7 @@ static void CalcStateExt ...@@ -1188,8 +1186,7 @@ static void CalcStateExt
* Extended RIVA registers. * Extended RIVA registers.
*/ */
pixelDepth = (bpp + 1)/8; pixelDepth = (bpp + 1)/8;
CalcVClock(dotClock, hDisplaySize < 512, /* double scan? */ CalcVClock(dotClock, &VClk, &m, &n, &p, chip);
&VClk, &m, &n, &p, chip);
switch (chip->Architecture) switch (chip->Architecture)
{ {
...@@ -1229,9 +1226,9 @@ static void CalcStateExt ...@@ -1229,9 +1226,9 @@ static void CalcStateExt
&(state->arbitration0), &(state->arbitration0),
&(state->arbitration1), &(state->arbitration1),
chip); chip);
state->cursor0 = 0x00; state->cursor0 = 0x00;
state->cursor1 = 0xFC; state->cursor1 = 0xFC;
state->cursor2 = 0x00000000; state->cursor2 = 0x00000000;
state->pllsel = 0x10000700; state->pllsel = 0x10000700;
state->config = chip->PFB[0x00000200/4]; state->config = chip->PFB[0x00000200/4];
state->general = bpp == 16 ? 0x00101100 : 0x00100100; state->general = bpp == 16 ? 0x00101100 : 0x00100100;
...@@ -1239,13 +1236,7 @@ static void CalcStateExt ...@@ -1239,13 +1236,7 @@ static void CalcStateExt
break; break;
} }
state->vpll = (p << 16) | (n << 8) | m; state->vpll = (p << 16) | (n << 8) | m;
state->screen = ((hTotal & 0x040) >> 2)
| ((vDisplay & 0x400) >> 7)
| ((vStart & 0x400) >> 8)
| ((vDisplay & 0x400) >> 9)
| ((vTotal & 0x400) >> 10);
state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3; state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3;
state->horiz = hTotal < 260 ? 0x00 : 0x01;
state->pixel = pixelDepth > 2 ? 3 : pixelDepth; state->pixel = pixelDepth > 2 ? 3 : pixelDepth;
state->offset0 = state->offset0 =
state->offset1 = state->offset1 =
...@@ -1508,7 +1499,7 @@ static void LoadStateExt ...@@ -1508,7 +1499,7 @@ static void LoadStateExt
chip->PGRAPH[0x00000F50/4] = 0x00000040; chip->PGRAPH[0x00000F50/4] = 0x00000040;
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
chip->PGRAPH[0x00000F54/4] = 0x00000000; chip->PGRAPH[0x00000F54/4] = 0x00000000;
break; break;
} }
LOAD_FIXED_STATE(Riva,FIFO); LOAD_FIXED_STATE(Riva,FIFO);
UpdateFifoState(chip); UpdateFifoState(chip);
...@@ -1537,11 +1528,12 @@ static void LoadStateExt ...@@ -1537,11 +1528,12 @@ static void LoadStateExt
chip->PRAMDAC[0x00000508/4] = state->vpll; chip->PRAMDAC[0x00000508/4] = state->vpll;
chip->PRAMDAC[0x0000050C/4] = state->pllsel; chip->PRAMDAC[0x0000050C/4] = state->pllsel;
chip->PRAMDAC[0x00000600/4] = state->general; chip->PRAMDAC[0x00000600/4] = state->general;
/* /*
* Turn off VBlank enable and reset. * Turn off VBlank enable and reset.
*/ */
*(chip->VBLANKENABLE) = 0; chip->PCRTC[0x00000140/4] = 0;
*(chip->VBLANK) = chip->VBlankBit; chip->PCRTC[0x00000100/4] = chip->VBlankBit;
/* /*
* Set interrupt enable. * Set interrupt enable.
*/ */
...@@ -1811,9 +1803,6 @@ static void nv3GetConfig ...@@ -1811,9 +1803,6 @@ static void nv3GetConfig
} }
chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000020) ? 14318 : 13500; chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000020) ? 14318 : 13500;
chip->CURSOR = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]); chip->CURSOR = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]);
chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
chip->VBLANKENABLE = &(chip->PGRAPH[0x0140/4]);
chip->VBLANK = &(chip->PGRAPH[0x0100/4]);
chip->VBlankBit = 0x00000100; chip->VBlankBit = 0x00000100;
chip->MaxVClockFreqKHz = 256000; chip->MaxVClockFreqKHz = 256000;
/* /*
...@@ -1872,9 +1861,6 @@ static void nv4GetConfig ...@@ -1872,9 +1861,6 @@ static void nv4GetConfig
} }
chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500; chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]); chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]);
chip->VBLANK = &(chip->PCRTC[0x0100/4]);
chip->VBlankBit = 0x00000001; chip->VBlankBit = 0x00000001;
chip->MaxVClockFreqKHz = 350000; chip->MaxVClockFreqKHz = 350000;
/* /*
...@@ -1892,12 +1878,30 @@ static void nv4GetConfig ...@@ -1892,12 +1878,30 @@ static void nv4GetConfig
} }
static void nv10GetConfig static void nv10GetConfig
( (
RIVA_HW_INST *chip RIVA_HW_INST *chip,
unsigned int chipset
) )
{ {
struct pci_dev* dev;
int amt;
#ifdef __BIG_ENDIAN
/* turn on big endian register access */
chip->PMC[0x00000004/4] = 0x01000001;
#endif
/* /*
* Fill in chip configuration. * Fill in chip configuration.
*/ */
if(chipset == NV_CHIP_IGEFORCE2) {
dev = pci_find_slot(0, 1);
pci_read_config_dword(dev, 0x7C, &amt);
chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
} else if(chipset == NV_CHIP_0x01F0) {
dev = pci_find_slot(0, 1);
pci_read_config_dword(dev, 0x84, &amt);
chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
} else {
switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF) switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF)
{ {
case 0x02: case 0x02:
...@@ -1925,6 +1929,7 @@ static void nv10GetConfig ...@@ -1925,6 +1929,7 @@ static void nv10GetConfig
chip->RamAmountKBytes = 1024 * 16; chip->RamAmountKBytes = 1024 * 16;
break; break;
} }
}
switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003) switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003)
{ {
case 3: case 3:
...@@ -1936,9 +1941,6 @@ static void nv10GetConfig ...@@ -1936,9 +1941,6 @@ static void nv10GetConfig
} }
chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500; chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]); chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]);
chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]);
chip->VBLANK = &(chip->PCRTC[0x0100/4]);
chip->VBlankBit = 0x00000001; chip->VBlankBit = 0x00000001;
chip->MaxVClockFreqKHz = 350000; chip->MaxVClockFreqKHz = 350000;
/* /*
...@@ -1952,11 +1954,12 @@ static void nv10GetConfig ...@@ -1952,11 +1954,12 @@ static void nv10GetConfig
chip->SetStartAddress = SetStartAddress; chip->SetStartAddress = SetStartAddress;
chip->SetSurfaces2D = nv10SetSurfaces2D; chip->SetSurfaces2D = nv10SetSurfaces2D;
chip->SetSurfaces3D = nv10SetSurfaces3D; chip->SetSurfaces3D = nv10SetSurfaces3D;
chip->LockUnlock = nv10LockUnlock; chip->LockUnlock = nv4LockUnlock;
} }
int RivaGetConfig int RivaGetConfig
( (
RIVA_HW_INST *chip RIVA_HW_INST *chip,
unsigned int chipset
) )
{ {
/* /*
...@@ -1975,11 +1978,13 @@ int RivaGetConfig ...@@ -1975,11 +1978,13 @@ int RivaGetConfig
nv4GetConfig(chip); nv4GetConfig(chip);
break; break;
case NV_ARCH_10: case NV_ARCH_10:
nv10GetConfig(chip); case NV_ARCH_20:
nv10GetConfig(chip, chipset);
break; break;
default: default:
return (-1); return (-1);
} }
chip->Chipset = chipset;
/* /*
* Fill in FIFO pointers. * Fill in FIFO pointers.
*/ */
......
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
* from this source. -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99 * from this source. -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99
*/ */
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.6 2000/02/08 17:19:12 dawes Exp $ */ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.21 2002/10/14 18:22:46 mvojkovi Exp $ */
#ifndef __RIVA_HW_H__ #ifndef __RIVA_HW_H__
#define __RIVA_HW_H__ #define __RIVA_HW_H__
#define RIVA_SW_VERSION 0x00010003 #define RIVA_SW_VERSION 0x00010003
...@@ -78,8 +78,8 @@ typedef unsigned int U032; ...@@ -78,8 +78,8 @@ typedef unsigned int U032;
#define NV_WR08(p,i,d) out_8(p+i, d) #define NV_WR08(p,i,d) out_8(p+i, d)
#define NV_RD08(p,i) in_8(p+i) #define NV_RD08(p,i) in_8(p+i)
#else #else
#define NV_WR08(p,i,d) (((U008 *)(p))[i]=(d)) #define NV_WR08(p,i,d) (((U008 *)(p))[i]=(d))
#define NV_RD08(p,i) (((U008 *)(p))[i]) #define NV_RD08(p,i) (((U008 *)(p))[i])
#endif #endif
#define NV_WR16(p,i,d) (((U016 *)(p))[(i)/2]=(d)) #define NV_WR16(p,i,d) (((U016 *)(p))[(i)/2]=(d))
#define NV_RD16(p,i) (((U016 *)(p))[(i)/2]) #define NV_RD16(p,i) (((U016 *)(p))[(i)/2])
...@@ -426,7 +426,7 @@ typedef struct _riva_hw_inst ...@@ -426,7 +426,7 @@ typedef struct _riva_hw_inst
*/ */
U032 Architecture; U032 Architecture;
U032 Version; U032 Version;
U032 Chipset; U032 Chipset;
U032 CrystalFreqKHz; U032 CrystalFreqKHz;
U032 RamAmountKBytes; U032 RamAmountKBytes;
U032 MaxVClockFreqKHz; U032 MaxVClockFreqKHz;
...@@ -454,10 +454,7 @@ typedef struct _riva_hw_inst ...@@ -454,10 +454,7 @@ typedef struct _riva_hw_inst
volatile U032 *PRAMIN; volatile U032 *PRAMIN;
volatile U032 *FIFO; volatile U032 *FIFO;
volatile U032 *CURSOR; volatile U032 *CURSOR;
volatile U032 *CURSORPOS; volatile U008 *PCIO0;
volatile U032 *VBLANKENABLE;
volatile U032 *VBLANK;
volatile U008 *PCIO0;
volatile U008 *PCIO; volatile U008 *PCIO;
volatile U008 *PVIO; volatile U008 *PVIO;
volatile U008 *PDIO0; volatile U008 *PDIO0;
...@@ -467,7 +464,7 @@ typedef struct _riva_hw_inst ...@@ -467,7 +464,7 @@ typedef struct _riva_hw_inst
* Common chip functions. * Common chip functions.
*/ */
int (*Busy)(struct _riva_hw_inst *); int (*Busy)(struct _riva_hw_inst *);
void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int,int,int,int,int,int,int,int,int); void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int);
void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *); void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *); void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
void (*SetStartAddress)(struct _riva_hw_inst *,U032); void (*SetStartAddress)(struct _riva_hw_inst *,U032);
...@@ -516,10 +513,10 @@ typedef struct _riva_hw_state ...@@ -516,10 +513,10 @@ typedef struct _riva_hw_state
U032 pllsel; U032 pllsel;
U032 general; U032 general;
U032 crtcOwner; U032 crtcOwner;
U032 head; U032 head;
U032 head2; U032 head2;
U032 config; U032 config;
U032 cursorConfig; U032 cursorConfig;
U032 cursor0; U032 cursor0;
U032 cursor1; U032 cursor1;
U032 cursor2; U032 cursor2;
...@@ -535,16 +532,16 @@ typedef struct _riva_hw_state ...@@ -535,16 +532,16 @@ typedef struct _riva_hw_state
/* /*
* External routines. * External routines.
*/ */
int RivaGetConfig(RIVA_HW_INST *); int RivaGetConfig(RIVA_HW_INST *, unsigned int);
/* /*
* FIFO Free Count. Should attempt to yield processor if RIVA is busy. * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
*/ */
#define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \ #define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \
{ \ { \
while ((hwinst).FifoFreeCount < (cnt)) \ while ((hwinst).FifoFreeCount < (cnt)) \
(hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2; \ (hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2; \
(hwinst).FifoFreeCount -= (cnt); \ (hwinst).FifoFreeCount -= (cnt); \
} }
#endif /* __RIVA_HW_H__ */ #endif /* __RIVA_HW_H__ */
...@@ -41,9 +41,16 @@ struct riva_par { ...@@ -41,9 +41,16 @@ struct riva_par {
u32 riva_palette[16]; u32 riva_palette[16];
u32 cursor_data[32 * 32/4]; u32 cursor_data[32 * 32/4];
int cursor_reset; int cursor_reset;
unsigned char *EDID;
unsigned int Chipset;
int forceCRTC;
Bool SecondCRTC;
int FlatPanel;
#ifdef CONFIG_MTRR #ifdef CONFIG_MTRR
struct { int vram; int vram_valid; } mtrr; struct { int vram; int vram_valid; } mtrr;
#endif #endif
}; };
void riva_common_setup(struct riva_par *);
#endif /* __RIVAFB_H */ #endif /* __RIVAFB_H */
This diff is collapsed.
...@@ -4,8 +4,6 @@ ...@@ -4,8 +4,6 @@
* Copyright (c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr> * Copyright (c) 2000,2001 Ghozlane Toumi <gtoumi@messel.emse.fr>
* *
* Created 28 Aug 2001 by Ghozlane Toumi * Created 28 Aug 2001 by Ghozlane Toumi
*
* $Id: sstfb.h,v 1.8 2002/05/10 19:35:11 ghoz Exp $
*/ */
...@@ -25,7 +23,6 @@ ...@@ -25,7 +23,6 @@
# undef SST_DEBUG_REG # undef SST_DEBUG_REG
# undef SST_DEBUG_FUNC # undef SST_DEBUG_FUNC
# undef SST_DEBUG_VAR # undef SST_DEBUG_VAR
# undef SST_DEBUG_IOCTL
#endif #endif
#if (SST_DEBUG_REG > 0) #if (SST_DEBUG_REG > 0)
...@@ -73,8 +70,6 @@ ...@@ -73,8 +70,6 @@
#define wprintk(X...) printk(KERN_WARNING "sstfb: " X) #define wprintk(X...) printk(KERN_WARNING "sstfb: " X)
#define BIT(x) (1ul<<(x)) #define BIT(x) (1ul<<(x))
#define PS2KHZ(a) (1000000000UL/(a)) /* picoseconds to KHz */
#define KHZ2PS(a) (1000000000UL/(a))
#define POW2(x) (1ul<<(x)) #define POW2(x) (1ul<<(x))
#ifndef ABS #ifndef ABS
...@@ -114,7 +109,11 @@ ...@@ -114,7 +109,11 @@
# define RD_BUFF_FRONT 0 /* read buff select (front) */ # define RD_BUFF_FRONT 0 /* read buff select (front) */
# define RD_BUFF_BACK (1 << 6) /* back */ # define RD_BUFF_BACK (1 << 6) /* back */
# define EN_PXL_PIPELINE BIT(8) /* pixel pipeline (clip..)*/ # define EN_PXL_PIPELINE BIT(8) /* pixel pipeline (clip..)*/
# define LFB_WORD_SWIZZLE_WR BIT(11) /* enable write-wordswap (big-endian) */
# define LFB_BYTE_SWIZZLE_WR BIT(12) /* enable write-byteswap (big-endian) */
# define LFB_INVERT_Y BIT(13) /* invert Y origin (LFB) */ # define LFB_INVERT_Y BIT(13) /* invert Y origin (LFB) */
# define LFB_WORD_SWIZZLE_RD BIT(15) /* enable read-wordswap (big-endian) */
# define LFB_BYTE_SWIZZLE_RD BIT(16) /* enable read-byteswap (big-endian) */
#define CLIP_LEFT_RIGHT 0x0118 #define CLIP_LEFT_RIGHT 0x0118
#define CLIP_LOWY_HIGHY 0x011c #define CLIP_LOWY_HIGHY 0x011c
#define NOPCMD 0x0120 #define NOPCMD 0x0120
...@@ -305,9 +304,9 @@ struct sstfb_info; ...@@ -305,9 +304,9 @@ struct sstfb_info;
struct dac_switch { struct dac_switch {
char * name; char * name;
int (*detect) (struct sstfb_info *sst_info); int (*detect) (struct fb_info *info);
int (*set_pll) (struct sstfb_info *sst_info, const struct pll_timing *t, const int clock); int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock);
void (*set_vidmod) (struct sstfb_info *sst_info, const int bpp); void (*set_vidmod) (struct fb_info *info, const int bpp);
}; };
struct sst_spec { struct sst_spec {
...@@ -332,51 +331,12 @@ struct sstfb_par { ...@@ -332,51 +331,12 @@ struct sstfb_par {
unsigned int vmode; /* doublescan/interlaced */ unsigned int vmode; /* doublescan/interlaced */
unsigned int sync; /* H/V sync polarity */ unsigned int sync; /* H/V sync polarity */
unsigned int valid; /* par is correct (fool proof) */ unsigned int valid; /* par is correct (fool proof) */
}; unsigned long mmio_vbase;
struct sstfb_info {
struct fb_info info;
struct sstfb_par current_par;
struct pci_dev * dev;
struct {
unsigned long base; /* physical */
unsigned long vbase; /* virtual (CPU view) */
unsigned long len;
} video; /* fb memory info */
struct {
unsigned long base;
unsigned long vbase;
} mmio; /* registers memory info */
struct dac_switch dac_sw; /* dac specific functions */ struct dac_switch dac_sw; /* dac specific functions */
struct pci_dev *dev;
int type; int type;
u8 revision; u8 revision;
int gfx_clock; /* status */
/* status */
/*XXX int configured;
int indexed_mode;
int vgapass;
int clipping; */
int gfx_clock;
int currcon;
struct display disp; /* current display */
struct { u_int red, green, blue, transp; } palette[16];
union {
#ifdef FBCON_HAS_CFB16
u16 cfb16[16];
#endif
#ifdef EN_24_32_BPP
#if defined (FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
u32 cfb32[16];
#endif
#endif
} fbcon_cmap;
}; };
#endif /* _SSTFB_H_ */ #endif /* _SSTFB_H_ */
...@@ -1212,9 +1212,6 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev, ...@@ -1212,9 +1212,6 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10); printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
/* clear framebuffer memory */
memset_io(info->screen_base, 0, tdfx_fix.smem_len);
tdfx_fix.ypanstep = nopan ? 0 : 1; tdfx_fix.ypanstep = nopan ? 0 : 1;
tdfx_fix.ywrapstep = nowrap ? 0 : 1; tdfx_fix.ywrapstep = nowrap ? 0 : 1;
......
...@@ -457,9 +457,9 @@ extern void cfb_imageblit(struct fb_info *info, struct fb_image *image); ...@@ -457,9 +457,9 @@ extern void cfb_imageblit(struct fb_info *info, struct fb_image *image);
/* drivers/video/fbmem.c */ /* drivers/video/fbmem.c */
extern int register_framebuffer(struct fb_info *fb_info); extern int register_framebuffer(struct fb_info *fb_info);
extern int unregister_framebuffer(struct fb_info *fb_info); extern int unregister_framebuffer(struct fb_info *fb_info);
extern int fb_show_logo(struct fb_info *fb_info);
extern int num_registered_fb;
extern struct fb_info *registered_fb[FB_MAX]; extern struct fb_info *registered_fb[FB_MAX];
extern int num_registered_fb;
/* drivers/video/fbmon.c */ /* drivers/video/fbmon.c */
extern int fbmon_valid_timings(u_int pixclock, u_int htotal, u_int vtotal, extern int fbmon_valid_timings(u_int pixclock, u_int htotal, u_int vtotal,
......
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