Commit c7c6b390 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer Committed by Ralf Baechle

[MIPS] Use correct dma flushing in dma_cache_sync()

Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 930bff88
......@@ -383,7 +383,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
BUG_ON(direction == DMA_NONE);
if (!plat_device_is_coherent(dev))
dma_cache_wback_inv((unsigned long)vaddr, size);
__dma_sync((unsigned long)vaddr, size, direction);
}
EXPORT_SYMBOL(dma_cache_sync);
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