Commit c8c959f6 authored by Jiansong Chen's avatar Jiansong Chen Committed by Alex Deucher

drm/amdgpu: initialize IP offset for navy_flounder

since navy_flounder has the same ip offset with sienna_cichlid,
follow sienna_cichlid setting for the moment.
Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarTao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 543aa259
...@@ -424,6 +424,7 @@ static int nv_reg_base_init(struct amdgpu_device *adev) ...@@ -424,6 +424,7 @@ static int nv_reg_base_init(struct amdgpu_device *adev)
navi12_reg_base_init(adev); navi12_reg_base_init(adev);
break; break;
case CHIP_SIENNA_CICHLID: case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
sienna_cichlid_reg_base_init(adev); sienna_cichlid_reg_base_init(adev);
break; break;
default: default:
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment