Commit ca247341 authored by Jeff Garzik's avatar Jeff Garzik

[netdrvr ixgb] Lindent, then fix up obvious indent uglies by hand

parent d2f797b0
......@@ -64,16 +64,14 @@ struct ixgb_adapter;
#define BAR_0 0
#define BAR_1 1
#define BAR_5 5
#define BAR_5 5
#define PCI_DMA_64BIT 0xffffffffffffffffULL
#define PCI_DMA_32BIT 0x00000000ffffffffULL
#include "ixgb_hw.h"
#include "ixgb_ee.h"
#include "ixgb_ids.h"
#if _DEBUG_DRIVER_
#define IXGB_DBG(args...) printk(KERN_DEBUG "ixgb: " args)
#else
......@@ -100,27 +98,27 @@ struct ixgb_adapter;
/* wrapper around a pointer to a socket buffer,
* so a DMA handle can be stored along with the buffer */
struct ixgb_buffer {
struct sk_buff *skb;
uint64_t dma;
unsigned long length;
unsigned long time_stamp;
struct sk_buff *skb;
uint64_t dma;
unsigned long length;
unsigned long time_stamp;
};
struct ixgb_desc_ring {
/* pointer to the descriptor ring memory */
void *desc;
/* physical address of the descriptor ring */
dma_addr_t dma;
/* length of descriptor ring in bytes */
unsigned int size;
/* number of descriptors in the ring */
unsigned int count;
/* next descriptor to associate a buffer with */
unsigned int next_to_use;
/* next descriptor to check for DD status bit */
unsigned int next_to_clean;
/* array of buffer information structs */
struct ixgb_buffer *buffer_info;
/* pointer to the descriptor ring memory */
void *desc;
/* physical address of the descriptor ring */
dma_addr_t dma;
/* length of descriptor ring in bytes */
unsigned int size;
/* number of descriptors in the ring */
unsigned int count;
/* next descriptor to associate a buffer with */
unsigned int next_to_use;
/* next descriptor to check for DD status bit */
unsigned int next_to_clean;
/* array of buffer information structs */
struct ixgb_buffer *buffer_info;
};
#define IXGB_DESC_UNUSED(R) \
......@@ -134,54 +132,54 @@ struct ixgb_desc_ring {
/* board specific private data structure */
struct ixgb_adapter {
struct timer_list watchdog_timer;
struct timer_list watchdog_timer;
struct vlan_group *vlgrp;
char *id_string;
uint32_t bd_number;
uint32_t rx_buffer_len;
uint32_t part_num;
uint16_t link_speed;
uint16_t link_duplex;
atomic_t irq_sem;
struct work_struct tx_timeout_task;
char *id_string;
uint32_t bd_number;
uint32_t rx_buffer_len;
uint32_t part_num;
uint16_t link_speed;
uint16_t link_duplex;
atomic_t irq_sem;
struct work_struct tx_timeout_task;
#ifdef ETHTOOL_PHYS_ID
struct timer_list blink_timer;
unsigned long led_status;
struct timer_list blink_timer;
unsigned long led_status;
#endif
#ifdef _INTERNAL_LOOPBACK_DRIVER_
struct ixgb_desc_ring diag_tx_ring;
struct ixgb_desc_ring diag_rx_ring;
struct ixgb_desc_ring diag_tx_ring;
struct ixgb_desc_ring diag_rx_ring;
#endif
/* TX */
struct ixgb_desc_ring tx_ring;
unsigned long timeo_start;
uint32_t tx_cmd_type;
int max_data_per_txd;
uint64_t hw_csum_tx_good;
uint64_t hw_csum_tx_error;
boolean_t tx_csum;
uint32_t tx_int_delay;
boolean_t tx_int_delay_enable;
/* RX */
struct ixgb_desc_ring rx_ring;
uint64_t hw_csum_rx_error;
uint64_t hw_csum_rx_good;
uint32_t rx_int_delay;
boolean_t raidc;
boolean_t rx_csum;
/* OS defined structs */
struct net_device *netdev;
struct pci_dev *pdev;
struct net_device_stats net_stats;
/* structs defined in ixgb_hw.h */
struct ixgb_hw hw;
struct ixgb_hw_stats stats;
uint32_t pci_state[16];
char ifname[IFNAMSIZ];
/* TX */
struct ixgb_desc_ring tx_ring;
unsigned long timeo_start;
uint32_t tx_cmd_type;
int max_data_per_txd;
uint64_t hw_csum_tx_good;
uint64_t hw_csum_tx_error;
boolean_t tx_csum;
uint32_t tx_int_delay;
boolean_t tx_int_delay_enable;
/* RX */
struct ixgb_desc_ring rx_ring;
uint64_t hw_csum_rx_error;
uint64_t hw_csum_rx_good;
uint32_t rx_int_delay;
boolean_t raidc;
boolean_t rx_csum;
/* OS defined structs */
struct net_device *netdev;
struct pci_dev *pdev;
struct net_device_stats net_stats;
/* structs defined in ixgb_hw.h */
struct ixgb_hw hw;
struct ixgb_hw_stats stats;
uint32_t pci_state[16];
char ifname[IFNAMSIZ];
};
#endif /* _IXGB_H_ */
#endif /* _IXGB_H_ */
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......@@ -28,18 +28,16 @@
#ifndef _IXGB_EE_H_
#define _IXGB_EE_H_
#define IXGB_EEPROM_SIZE 64 /* Size in words */
#define IXGB_EEPROM_SIZE 64 /* Size in words */
#define IXGB_ETH_LENGTH_OF_ADDRESS 6
/* EEPROM Commands */
#define EEPROM_READ_OPCODE 0x6 /* EERPOM read opcode */
#define EEPROM_WRITE_OPCODE 0x5 /* EERPOM write opcode */
#define EEPROM_ERASE_OPCODE 0x7 /* EERPOM erase opcode */
#define EEPROM_EWEN_OPCODE 0x13 /* EERPOM erase/write enable */
#define EEPROM_EWDS_OPCODE 0x10 /* EERPOM erast/write disable */
#define EEPROM_READ_OPCODE 0x6 /* EERPOM read opcode */
#define EEPROM_WRITE_OPCODE 0x5 /* EERPOM write opcode */
#define EEPROM_ERASE_OPCODE 0x7 /* EERPOM erase opcode */
#define EEPROM_EWEN_OPCODE 0x13 /* EERPOM erase/write enable */
#define EEPROM_EWDS_OPCODE 0x10 /* EERPOM erast/write disable */
/* EEPROM MAP (Word Offsets) */
#define EEPROM_IA_1_2_REG 0x0000
......@@ -74,37 +72,33 @@
/* EEPROM Map defines (WORD OFFSETS)*/
/* EEPROM structure */
struct ixgb_ee_map_type{
uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
uint16_t compatibility;
uint16_t reserved1[4];
uint32_t pba_number;
uint16_t init_ctrl_reg_1;
uint16_t subsystem_id;
uint16_t subvendor_id;
uint16_t device_id;
uint16_t vendor_id;
uint16_t init_ctrl_reg_2;
uint16_t oem_reserved[16];
uint16_t swdpins_reg;
uint16_t circuit_ctrl_reg;
uint8_t d3_power;
uint8_t d0_power;
uint16_t reserved2[28];
uint16_t checksum;
};
struct ixgb_ee_map_type {
uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
uint16_t compatibility;
uint16_t reserved1[4];
uint32_t pba_number;
uint16_t init_ctrl_reg_1;
uint16_t subsystem_id;
uint16_t subvendor_id;
uint16_t device_id;
uint16_t vendor_id;
uint16_t init_ctrl_reg_2;
uint16_t oem_reserved[16];
uint16_t swdpins_reg;
uint16_t circuit_ctrl_reg;
uint8_t d3_power;
uint8_t d0_power;
uint16_t reserved2[28];
uint16_t checksum;
};
/* EEPROM Functions */
uint16_t ixgb_read_eeprom(struct ixgb_hw *hw,
uint16_t reg);
uint16_t ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t reg);
boolean_t ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
void ixgb_write_eeprom(struct ixgb_hw *hw,
uint16_t reg,
uint16_t data);
#endif /* IXGB_EE_H */
void ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t reg, uint16_t data);
#endif /* IXGB_EE_H */
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......@@ -25,7 +25,6 @@
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
#ifndef _IXGB_IDS_H_
#define _IXGB_IDS_H_
......@@ -37,9 +36,9 @@
#define INTEL_SUBVENDOR_ID 0x8086
#define IXGB_DEVICE_ID_82597EX 0x1048
#define IXGB_SUBDEVICE_ID_A11F 0xA11F /* Adapter-OEM-1310nm-Fiber */
#define IXGB_SUBDEVICE_ID_A01F 0xA01F /* Adapter-Retail-1310nm-Fiber */
#define IXGB_SUBDEVICE_ID_A11F 0xA11F /* Adapter-OEM-1310nm-Fiber */
#define IXGB_SUBDEVICE_ID_A01F 0xA01F /* Adapter-Retail-1310nm-Fiber */
#endif /* #ifndef _IXGB_IDS_H_ */
#endif /* #ifndef _IXGB_IDS_H_ */
/* End of File */
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......@@ -25,7 +25,6 @@
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
/* glue for the OS independant part of ixgb
* includes register access macros
*/
......@@ -52,8 +51,8 @@
#define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
typedef enum {
FALSE = 0,
TRUE = 1
FALSE = 0,
TRUE = 1
} boolean_t;
#define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B)
......@@ -87,4 +86,4 @@ typedef enum {
#define IXGB_MEMCPY memcpy
#endif /* IXGB_OSDEP_H */
#endif /* IXGB_OSDEP_H */
......@@ -132,7 +132,6 @@ IXGB_PARAM(RxIntDelay, "Receive Interrupt Delay");
IXGB_PARAM(RAIDC, "Disable or enable Receive Interrupt Moderation");
/* Receive Flow control high threshold (when we send a pause frame)
* (FCRTH)
*
......@@ -143,7 +142,6 @@ IXGB_PARAM(RAIDC, "Disable or enable Receive Interrupt Moderation");
IXGB_PARAM(RxFCHighThresh, "Receive Flow Control High Threshold");
/* Receive Flow control low threshold (when we send a resume frame)
* (FCRTL)
*
......@@ -155,7 +153,6 @@ IXGB_PARAM(RxFCHighThresh, "Receive Flow Control High Threshold");
IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold");
/* Flow control request timeout (how long to pause the link partner's tx)
* (PAP 15:0)
*
......@@ -166,7 +163,6 @@ IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold");
IXGB_PARAM(FCReqTimeout, "Flow Control Request Timeout");
/* Transmit Interrupt Delay in units of 0.8192 microseconds
*
* Valid Range: 0-65535
......@@ -213,7 +209,6 @@ IXGB_PARAM(IntDelayEnable, "Transmit Interrupt Delay Enable");
#define MIN_FCPAUSE 1
#define MAX_FCPAUSE 0xffff
struct ixgb_option {
enum { enable_option, range_option, list_option } type;
char *name;
......@@ -235,10 +230,9 @@ struct ixgb_option {
};
static int __devinit
ixgb_validate_option(int *value,
struct ixgb_option *opt)
ixgb_validate_option(int *value, struct ixgb_option *opt)
{
if(*value == OPTION_UNSET) {
if (*value == OPTION_UNSET) {
*value = opt->def;
return 0;
}
......@@ -255,7 +249,7 @@ ixgb_validate_option(int *value,
}
break;
case range_option:
if(*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
printk(KERN_INFO "%s set to %i\n", opt->name, *value);
return 0;
}
......@@ -265,10 +259,10 @@ ixgb_validate_option(int *value,
int i;
struct ixgb_opt_list *ent;
for(i = 0; i < opt->arg.l.nr; i++) {
for (i = 0; i < opt->arg.l.nr; i++) {
ent = &opt->arg.l.p[i];
if(*value == ent->i) {
if(ent->str[0] != '\0')
if (*value == ent->i) {
if (ent->str[0] != '\0')
printk(KERN_INFO "%s",
ent->str);
return 0;
......@@ -305,8 +299,9 @@ ixgb_check_options(struct ixgb_adapter *adapter)
IXGB_DBG("ixgb_check_options\n");
if(board >= IXGB_MAX_NIC) {
printk(KERN_NOTICE "Warning: no configuration for board #%i\n", board);
if (board >= IXGB_MAX_NIC) {
printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
board);
printk(KERN_NOTICE "Using defaults for all values\n");
board = IXGB_MAX_NIC;
}
......@@ -317,7 +312,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
.name = "Transmit Descriptors",
.err = "using default of " __MODULE_STRING(DEFAULT_TXD),
.def = DEFAULT_TXD,
.arg = {.r = {.min = MIN_TXD, .max = MAX_TXD}}
.arg = {.r = {.min = MIN_TXD,.max = MAX_TXD}}
};
struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
......@@ -332,7 +327,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
.name = "Receive Descriptors",
.err = "using default of " __MODULE_STRING(DEFAULT_RXD),
.def = DEFAULT_RXD,
.arg = {.r = {.min = MIN_RXD, .max = MAX_RXD}}
.arg = {.r = {.min = MIN_RXD,.max = MAX_RXD}}
};
struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
......@@ -368,7 +363,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
}
{ /* Flow Control */
struct ixgb_opt_list fc_list[] = {
struct ixgb_opt_list fc_list[] = {
{ixgb_fc_none, "Flow Control Disabled\n"},
{ixgb_fc_rx_pause, "Flow Control Receive Only\n"},
{ixgb_fc_tx_pause, "Flow Control Transmit Only\n"},
......@@ -381,59 +376,63 @@ ixgb_check_options(struct ixgb_adapter *adapter)
.name = "Flow Control",
.err = "reading default settings from EEPROM",
.def = ixgb_fc_full,
.arg = {.l = {.nr = LIST_LEN(fc_list), .p = fc_list}}
.arg = {.l = {.nr = LIST_LEN(fc_list),.p = fc_list}}
};
int fc = FlowControl[board];
ixgb_validate_option(&fc, &opt);
adapter->hw.fc.type = fc;
}
}
{ /* Receive Flow Control High Threshold */
struct ixgb_option fcrth = {
struct ixgb_option fcrth = {
.type = range_option,
.name = "Rx Flow Control High Threshold",
.err = "using default of " __MODULE_STRING(DEFAULT_FCRTH),
.err =
"using default of " __MODULE_STRING(DEFAULT_FCRTH),
.def = DEFAULT_FCRTH,
.arg = {.r = {.min = MIN_FCRTH, .max = MAX_FCRTH}}
.arg = {.r = {.min = MIN_FCRTH,.max = MAX_FCRTH}}
};
adapter->hw.fc.high_water = RxFCHighThresh[board];
ixgb_validate_option(&adapter->hw.fc.high_water, &fcrth);
if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
printk (KERN_INFO
"Ignoring RxFCHighThresh when no RxFC\n");
if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
printk(KERN_INFO
"Ignoring RxFCHighThresh when no RxFC\n");
}
{ /* Receive Flow Control Low Threshold */
struct ixgb_option fcrtl = {
struct ixgb_option fcrtl = {
.type = range_option,
.name = "Rx Flow Control Low Threshold",
.err = "using default of " __MODULE_STRING(DEFAULT_FCRTL),
.err =
"using default of " __MODULE_STRING(DEFAULT_FCRTL),
.def = DEFAULT_FCRTL,
.arg = {.r = {.min = MIN_FCRTL, .max = MAX_FCRTL}}
.arg = {.r = {.min = MIN_FCRTL,.max = MAX_FCRTL}}
};
adapter->hw.fc.low_water = RxFCLowThresh[board];
ixgb_validate_option(&adapter->hw.fc.low_water, &fcrtl);
if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
printk (KERN_INFO
"Ignoring RxFCLowThresh when no RxFC\n");
if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
printk(KERN_INFO
"Ignoring RxFCLowThresh when no RxFC\n");
}
{ /* Flow Control Pause Time Request*/
struct ixgb_option fcpap = {
{ /* Flow Control Pause Time Request */
struct ixgb_option fcpap = {
.type = range_option,
.name = "Flow Control Pause Time Request",
.err = "using default of "__MODULE_STRING(DEFAULT_FCPAUSE),
.err =
"using default of "
__MODULE_STRING(DEFAULT_FCPAUSE),
.def = DEFAULT_FCPAUSE,
.arg = {.r = {.min = MIN_FCPAUSE, .max = MAX_FCPAUSE}}
.arg = {.r = {.min = MIN_FCPAUSE,.max = MAX_FCPAUSE}}
};
int pause_time = FCReqTimeout[board];
ixgb_validate_option(&pause_time, &fcpap);
if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
printk (KERN_INFO
"Ignoring FCReqTimeout when no RxFC\n");
if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
printk(KERN_INFO
"Ignoring FCReqTimeout when no RxFC\n");
adapter->hw.fc.pause_time = pause_time;
}
/* high low and spacing check for rx flow control thresholds */
......@@ -441,20 +440,21 @@ ixgb_check_options(struct ixgb_adapter *adapter)
/* high must be greater than low */
if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) {
/* set defaults */
printk (KERN_INFO
"RxFCHighThresh must be >= (RxFCLowThresh + 8), "
"Using Defaults\n");
printk(KERN_INFO
"RxFCHighThresh must be >= (RxFCLowThresh + 8), "
"Using Defaults\n");
adapter->hw.fc.high_water = DEFAULT_FCRTH;
adapter->hw.fc.low_water = DEFAULT_FCRTL;
adapter->hw.fc.low_water = DEFAULT_FCRTL;
}
}
{ /* Receive Interrupt Delay */
struct ixgb_option opt = {
.type = range_option,
.name = "Receive Interrupt Delay",
.err = "using default of " __MODULE_STRING(DEFAULT_RDTR),
.err =
"using default of " __MODULE_STRING(DEFAULT_RDTR),
.def = DEFAULT_RDTR,
.arg = {.r = {.min = MIN_RDTR, .max = MAX_RDTR}}
.arg = {.r = {.min = MIN_RDTR,.max = MAX_RDTR}}
};
adapter->rx_int_delay = RxIntDelay[board];
......@@ -473,20 +473,21 @@ ixgb_check_options(struct ixgb_adapter *adapter)
adapter->raidc = raidc;
}
{ /* Transmit Interrupt Delay */
{ /* Transmit Interrupt Delay */
struct ixgb_option opt = {
.type = range_option,
.name = "Transmit Interrupt Delay",
.err = "using default of " __MODULE_STRING(DEFAULT_TIDV),
.err =
"using default of " __MODULE_STRING(DEFAULT_TIDV),
.def = DEFAULT_TIDV,
.arg = {.r = {.min = MIN_TIDV, .max = MAX_TIDV}}
.arg = {.r = {.min = MIN_TIDV,.max = MAX_TIDV}}
};
adapter->tx_int_delay = TxIntDelay[board];
ixgb_validate_option(&adapter->tx_int_delay, &opt);
}
{ /* Transmit Interrupt Delay Enable */
{ /* Transmit Interrupt Delay Enable */
struct ixgb_option opt = {
.type = enable_option,
.name = "Tx Interrupt Delay Enable",
......
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