Commit ca439c9b authored by Olof Johansson's avatar Olof Johansson

Merge tag 'at91-fixes-non-critical' of git://github.com/at91linux/linux-at91 into fixes

From Nicolas Ferre, fixes for early boot hangs on at91:

Fixes for RTT & RTC interrupts that can fire early during boot process
and kill the system.

* tag 'at91-fixes-non-critical' of git://github.com/at91linux/linux-at91:
  ARM: at91: fix hanged boot due to early rtt-interrupt
  ARM: at91: fix hanged boot due to early rtc-interrupt
parents ba52b7d4 94c4c79f
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
obj-y := irq.o gpio.o setup.o obj-y := irq.o gpio.o setup.o sysirq_mask.o
obj-m := obj-m :=
obj-n := obj-n :=
obj- := obj- :=
......
...@@ -349,6 +349,8 @@ static void __init at91sam9260_initialize(void) ...@@ -349,6 +349,8 @@ static void __init at91sam9260_initialize(void)
arm_pm_idle = at91sam9_idle; arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
/* Register GPIO subsystem */ /* Register GPIO subsystem */
at91_gpio_init(at91sam9260_gpio, 3); at91_gpio_init(at91sam9260_gpio, 3);
} }
......
...@@ -291,6 +291,8 @@ static void __init at91sam9261_initialize(void) ...@@ -291,6 +291,8 @@ static void __init at91sam9261_initialize(void)
arm_pm_idle = at91sam9_idle; arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
/* Register GPIO subsystem */ /* Register GPIO subsystem */
at91_gpio_init(at91sam9261_gpio, 3); at91_gpio_init(at91sam9261_gpio, 3);
} }
......
...@@ -328,6 +328,9 @@ static void __init at91sam9263_initialize(void) ...@@ -328,6 +328,9 @@ static void __init at91sam9263_initialize(void)
arm_pm_idle = at91sam9_idle; arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
/* Register GPIO subsystem */ /* Register GPIO subsystem */
at91_gpio_init(at91sam9263_gpio, 5); at91_gpio_init(at91sam9263_gpio, 5);
} }
......
...@@ -377,6 +377,9 @@ static void __init at91sam9g45_initialize(void) ...@@ -377,6 +377,9 @@ static void __init at91sam9g45_initialize(void)
arm_pm_idle = at91sam9_idle; arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9g45_restart; arm_pm_restart = at91sam9g45_restart;
at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
/* Register GPIO subsystem */ /* Register GPIO subsystem */
at91_gpio_init(at91sam9g45_gpio, 5); at91_gpio_init(at91sam9g45_gpio, 5);
} }
......
...@@ -224,7 +224,13 @@ static void __init at91sam9n12_map_io(void) ...@@ -224,7 +224,13 @@ static void __init at91sam9n12_map_io(void)
at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
} }
static void __init at91sam9n12_initialize(void)
{
at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC);
}
AT91_SOC_START(at91sam9n12) AT91_SOC_START(at91sam9n12)
.map_io = at91sam9n12_map_io, .map_io = at91sam9n12_map_io,
.register_clocks = at91sam9n12_register_clocks, .register_clocks = at91sam9n12_register_clocks,
.init = at91sam9n12_initialize,
AT91_SOC_END AT91_SOC_END
...@@ -294,6 +294,9 @@ static void __init at91sam9rl_initialize(void) ...@@ -294,6 +294,9 @@ static void __init at91sam9rl_initialize(void)
arm_pm_idle = at91sam9_idle; arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart; arm_pm_restart = at91sam9_alt_restart;
at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
/* Register GPIO subsystem */ /* Register GPIO subsystem */
at91_gpio_init(at91sam9rl_gpio, 4); at91_gpio_init(at91sam9rl_gpio, 4);
} }
......
...@@ -322,6 +322,11 @@ static void __init at91sam9x5_map_io(void) ...@@ -322,6 +322,11 @@ static void __init at91sam9x5_map_io(void)
at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
} }
static void __init at91sam9x5_initialize(void)
{
at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC);
}
/* -------------------------------------------------------------------- /* --------------------------------------------------------------------
* Interrupt initialization * Interrupt initialization
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
...@@ -329,4 +334,5 @@ static void __init at91sam9x5_map_io(void) ...@@ -329,4 +334,5 @@ static void __init at91sam9x5_map_io(void)
AT91_SOC_START(at91sam9x5) AT91_SOC_START(at91sam9x5)
.map_io = at91sam9x5_map_io, .map_io = at91sam9x5_map_io,
.register_clocks = at91sam9x5_register_clocks, .register_clocks = at91sam9x5_register_clocks,
.init = at91sam9x5_initialize,
AT91_SOC_END AT91_SOC_END
...@@ -34,6 +34,8 @@ extern int __init at91_aic_of_init(struct device_node *node, ...@@ -34,6 +34,8 @@ extern int __init at91_aic_of_init(struct device_node *node,
struct device_node *parent); struct device_node *parent);
extern int __init at91_aic5_of_init(struct device_node *node, extern int __init at91_aic5_of_init(struct device_node *node,
struct device_node *parent); struct device_node *parent);
extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
/* Timer */ /* Timer */
......
...@@ -48,6 +48,11 @@ ...@@ -48,6 +48,11 @@
#define AT91SAM9N12_BASE_USART2 0xf8024000 #define AT91SAM9N12_BASE_USART2 0xf8024000
#define AT91SAM9N12_BASE_USART3 0xf8028000 #define AT91SAM9N12_BASE_USART3 0xf8028000
/*
* System Peripherals
*/
#define AT91SAM9N12_BASE_RTC 0xfffffeb0
/* /*
* Internal Memory. * Internal Memory.
*/ */
......
...@@ -54,6 +54,11 @@ ...@@ -54,6 +54,11 @@
#define AT91SAM9X5_BASE_USART1 0xf8020000 #define AT91SAM9X5_BASE_USART1 0xf8020000
#define AT91SAM9X5_BASE_USART2 0xf8024000 #define AT91SAM9X5_BASE_USART2 0xf8024000
/*
* System Peripherals
*/
#define AT91SAM9X5_BASE_RTC 0xfffffeb0
/* /*
* Internal Memory. * Internal Memory.
*/ */
......
...@@ -72,6 +72,11 @@ ...@@ -72,6 +72,11 @@
#define SAMA5D3_BASE_USART2 0xf8020000 #define SAMA5D3_BASE_USART2 0xf8020000
#define SAMA5D3_BASE_USART3 0xf8024000 #define SAMA5D3_BASE_USART3 0xf8024000
/*
* System Peripherals
*/
#define SAMA5D3_BASE_RTC 0xfffffeb0
/* /*
* Internal Memory * Internal Memory
*/ */
......
...@@ -371,7 +371,13 @@ static void __init sama5d3_map_io(void) ...@@ -371,7 +371,13 @@ static void __init sama5d3_map_io(void)
at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE);
} }
static void __init sama5d3_initialize(void)
{
at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC);
}
AT91_SOC_START(sama5d3) AT91_SOC_START(sama5d3)
.map_io = sama5d3_map_io, .map_io = sama5d3_map_io,
.register_clocks = sama5d3_register_clocks, .register_clocks = sama5d3_register_clocks,
.init = sama5d3_initialize,
AT91_SOC_END AT91_SOC_END
/*
* sysirq_mask.c - System-interrupt masking
*
* Copyright (C) 2013 Johan Hovold <jhovold@gmail.com>
*
* Functions to disable system interrupts from backup-powered peripherals.
*
* The RTC and RTT-peripherals are generally powered by backup power (VDDBU)
* and are not reset on wake-up, user, watchdog or software reset. This means
* that their interrupts may be enabled during early boot (e.g. after a user
* reset).
*
* As the RTC and RTT share the system-interrupt line with the PIT, an
* interrupt occurring before a handler has been installed would lead to the
* system interrupt being disabled and prevent the system from booting.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/io.h>
#include <mach/at91_rtt.h>
#include "generic.h"
#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
void __init at91_sysirq_mask_rtc(u32 rtc_base)
{
void __iomem *base;
u32 mask;
base = ioremap(rtc_base, 64);
if (!base)
return;
mask = readl_relaxed(base + AT91_RTC_IMR);
if (mask) {
pr_info("AT91: Disabling rtc irq\n");
writel_relaxed(mask, base + AT91_RTC_IDR);
(void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
}
iounmap(base);
}
void __init at91_sysirq_mask_rtt(u32 rtt_base)
{
void __iomem *base;
void __iomem *reg;
u32 mode;
base = ioremap(rtt_base, 16);
if (!base)
return;
reg = base + AT91_RTT_MR;
mode = readl_relaxed(reg);
if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) {
pr_info("AT91: Disabling rtt irq\n");
mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
writel_relaxed(mode, reg);
(void)readl_relaxed(reg); /* flush */
}
iounmap(base);
}
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment