Commit ce386100 authored by Emil Renner Berthing's avatar Emil Renner Berthing Committed by Mark Brown

spi: rockchip: disable spi on error

Successful transfers leave the spi disabled, so if
we just make sure to disable the spi on error
there should be no need to disable the spi from
master->unprepare_message.

This also flushes the tx and rx fifos,
so no need to do that manually.
Signed-off-by: default avatarEmil Renner Berthing <kernel@esmil.dk>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent fab3e487
...@@ -210,12 +210,6 @@ static inline void spi_set_clk(struct rockchip_spi *rs, u16 div) ...@@ -210,12 +210,6 @@ static inline void spi_set_clk(struct rockchip_spi *rs, u16 div)
writel_relaxed(div, rs->regs + ROCKCHIP_SPI_BAUDR); writel_relaxed(div, rs->regs + ROCKCHIP_SPI_BAUDR);
} }
static inline void flush_fifo(struct rockchip_spi *rs)
{
while (readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR))
readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR);
}
static inline void wait_for_idle(struct rockchip_spi *rs) static inline void wait_for_idle(struct rockchip_spi *rs)
{ {
unsigned long timeout = jiffies + msecs_to_jiffies(5); unsigned long timeout = jiffies + msecs_to_jiffies(5);
...@@ -304,29 +298,16 @@ static void rockchip_spi_handle_err(struct spi_master *master, ...@@ -304,29 +298,16 @@ static void rockchip_spi_handle_err(struct spi_master *master,
{ {
struct rockchip_spi *rs = spi_master_get_devdata(master); struct rockchip_spi *rs = spi_master_get_devdata(master);
/* /* stop running spi transfer
* For DMA mode, we need terminate DMA channel and flush * this also flushes both rx and tx fifos
* fifo for the next transfer if DMA thansfer timeout.
* handle_err() was called by core if transfer failed.
* Maybe it is reasonable for error handling here.
*/ */
spi_enable_chip(rs, false);
if (atomic_read(&rs->state) & TXDMA) if (atomic_read(&rs->state) & TXDMA)
dmaengine_terminate_async(rs->dma_tx.ch); dmaengine_terminate_async(rs->dma_tx.ch);
if (atomic_read(&rs->state) & RXDMA) { if (atomic_read(&rs->state) & RXDMA)
dmaengine_terminate_async(rs->dma_rx.ch); dmaengine_terminate_async(rs->dma_rx.ch);
flush_fifo(rs);
}
}
static int rockchip_spi_unprepare_message(struct spi_master *master,
struct spi_message *msg)
{
struct rockchip_spi *rs = spi_master_get_devdata(master);
spi_enable_chip(rs, false);
return 0;
} }
static void rockchip_spi_pio_writer(struct rockchip_spi *rs) static void rockchip_spi_pio_writer(struct rockchip_spi *rs)
...@@ -705,7 +686,6 @@ static int rockchip_spi_probe(struct platform_device *pdev) ...@@ -705,7 +686,6 @@ static int rockchip_spi_probe(struct platform_device *pdev)
master->set_cs = rockchip_spi_set_cs; master->set_cs = rockchip_spi_set_cs;
master->prepare_message = rockchip_spi_prepare_message; master->prepare_message = rockchip_spi_prepare_message;
master->unprepare_message = rockchip_spi_unprepare_message;
master->transfer_one = rockchip_spi_transfer_one; master->transfer_one = rockchip_spi_transfer_one;
master->max_transfer_size = rockchip_spi_max_transfer_size; master->max_transfer_size = rockchip_spi_max_transfer_size;
master->handle_err = rockchip_spi_handle_err; master->handle_err = rockchip_spi_handle_err;
......
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