Commit d0807323 authored by Takashi Iwai's avatar Takashi Iwai

Merge branch 'topic/sscape-fix' into for-linus

parents d7b6df5d 453e37b3
...@@ -368,14 +368,17 @@ config SND_SGALAXY ...@@ -368,14 +368,17 @@ config SND_SGALAXY
will be called snd-sgalaxy. will be called snd-sgalaxy.
config SND_SSCAPE config SND_SSCAPE
tristate "Ensoniq SoundScape PnP driver" tristate "Ensoniq SoundScape driver"
select SND_HWDEP select SND_HWDEP
select SND_MPU401_UART select SND_MPU401_UART
select SND_WSS_LIB select SND_WSS_LIB
help help
Say Y here to include support for Ensoniq SoundScape PnP Say Y here to include support for Ensoniq SoundScape
soundcards. soundcards.
The PCM audio is supported on SoundScape Classic, Elite, PnP
and VIVO cards. The MIDI support is very experimental.
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
will be called snd-sscape. will be called snd-sscape.
......
This diff is collapsed.
...@@ -181,25 +181,6 @@ static void snd_wss_wait(struct snd_wss *chip) ...@@ -181,25 +181,6 @@ static void snd_wss_wait(struct snd_wss *chip)
udelay(100); udelay(100);
} }
static void snd_wss_outm(struct snd_wss *chip, unsigned char reg,
unsigned char mask, unsigned char value)
{
unsigned char tmp = (chip->image[reg] & mask) | value;
snd_wss_wait(chip);
#ifdef CONFIG_SND_DEBUG
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
#endif
chip->image[reg] = tmp;
if (!chip->calibrate_mute) {
wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
wmb();
wss_outb(chip, CS4231P(REG), tmp);
mb();
}
}
static void snd_wss_dout(struct snd_wss *chip, unsigned char reg, static void snd_wss_dout(struct snd_wss *chip, unsigned char reg,
unsigned char value) unsigned char value)
{ {
...@@ -597,7 +578,15 @@ static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute) ...@@ -597,7 +578,15 @@ static void snd_wss_calibrate_mute(struct snd_wss *chip, int mute)
chip->image[CS4231_RIGHT_INPUT]); chip->image[CS4231_RIGHT_INPUT]);
snd_wss_dout(chip, CS4231_LOOPBACK, snd_wss_dout(chip, CS4231_LOOPBACK,
chip->image[CS4231_LOOPBACK]); chip->image[CS4231_LOOPBACK]);
} else {
snd_wss_dout(chip, CS4231_LEFT_INPUT,
0);
snd_wss_dout(chip, CS4231_RIGHT_INPUT,
0);
snd_wss_dout(chip, CS4231_LOOPBACK,
0xfd);
} }
snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT, snd_wss_dout(chip, CS4231_AUX1_LEFT_INPUT,
mute | chip->image[CS4231_AUX1_LEFT_INPUT]); mute | chip->image[CS4231_AUX1_LEFT_INPUT]);
snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT, snd_wss_dout(chip, CS4231_AUX1_RIGHT_INPUT,
...@@ -640,7 +629,6 @@ static void snd_wss_playback_format(struct snd_wss *chip, ...@@ -640,7 +629,6 @@ static void snd_wss_playback_format(struct snd_wss *chip,
int full_calib = 1; int full_calib = 1;
mutex_lock(&chip->mce_mutex); mutex_lock(&chip->mce_mutex);
snd_wss_calibrate_mute(chip, 1);
if (chip->hardware == WSS_HW_CS4231A || if (chip->hardware == WSS_HW_CS4231A ||
(chip->hardware & WSS_HW_CS4232_MASK)) { (chip->hardware & WSS_HW_CS4232_MASK)) {
spin_lock_irqsave(&chip->reg_lock, flags); spin_lock_irqsave(&chip->reg_lock, flags);
...@@ -656,6 +644,24 @@ static void snd_wss_playback_format(struct snd_wss *chip, ...@@ -656,6 +644,24 @@ static void snd_wss_playback_format(struct snd_wss *chip,
full_calib = 0; full_calib = 0;
} }
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
} else if (chip->hardware == WSS_HW_AD1845) {
unsigned rate = params_rate(params);
/*
* Program the AD1845 correctly for the playback stream.
* Note that we do NOT need to toggle the MCE bit because
* the PLAYBACK_ENABLE bit of the Interface Configuration
* register is set.
*
* NOTE: We seem to need to write to the MSB before the LSB
* to get the correct sample frequency.
*/
spin_lock_irqsave(&chip->reg_lock, flags);
snd_wss_out(chip, CS4231_PLAYBK_FORMAT, (pdfr & 0xf0));
snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
full_calib = 0;
spin_unlock_irqrestore(&chip->reg_lock, flags);
} }
if (full_calib) { if (full_calib) {
snd_wss_mce_up(chip); snd_wss_mce_up(chip);
...@@ -673,7 +679,6 @@ static void snd_wss_playback_format(struct snd_wss *chip, ...@@ -673,7 +679,6 @@ static void snd_wss_playback_format(struct snd_wss *chip,
udelay(100); /* this seems to help */ udelay(100); /* this seems to help */
snd_wss_mce_down(chip); snd_wss_mce_down(chip);
} }
snd_wss_calibrate_mute(chip, 0);
mutex_unlock(&chip->mce_mutex); mutex_unlock(&chip->mce_mutex);
} }
...@@ -685,7 +690,6 @@ static void snd_wss_capture_format(struct snd_wss *chip, ...@@ -685,7 +690,6 @@ static void snd_wss_capture_format(struct snd_wss *chip,
int full_calib = 1; int full_calib = 1;
mutex_lock(&chip->mce_mutex); mutex_lock(&chip->mce_mutex);
snd_wss_calibrate_mute(chip, 1);
if (chip->hardware == WSS_HW_CS4231A || if (chip->hardware == WSS_HW_CS4231A ||
(chip->hardware & WSS_HW_CS4232_MASK)) { (chip->hardware & WSS_HW_CS4232_MASK)) {
spin_lock_irqsave(&chip->reg_lock, flags); spin_lock_irqsave(&chip->reg_lock, flags);
...@@ -700,6 +704,24 @@ static void snd_wss_capture_format(struct snd_wss *chip, ...@@ -700,6 +704,24 @@ static void snd_wss_capture_format(struct snd_wss *chip,
full_calib = 0; full_calib = 0;
} }
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
} else if (chip->hardware == WSS_HW_AD1845) {
unsigned rate = params_rate(params);
/*
* Program the AD1845 correctly for the capture stream.
* Note that we do NOT need to toggle the MCE bit because
* the PLAYBACK_ENABLE bit of the Interface Configuration
* register is set.
*
* NOTE: We seem to need to write to the MSB before the LSB
* to get the correct sample frequency.
*/
spin_lock_irqsave(&chip->reg_lock, flags);
snd_wss_out(chip, CS4231_REC_FORMAT, (cdfr & 0xf0));
snd_wss_out(chip, AD1845_UPR_FREQ_SEL, (rate >> 8) & 0xff);
snd_wss_out(chip, AD1845_LWR_FREQ_SEL, rate & 0xff);
full_calib = 0;
spin_unlock_irqrestore(&chip->reg_lock, flags);
} }
if (full_calib) { if (full_calib) {
snd_wss_mce_up(chip); snd_wss_mce_up(chip);
...@@ -724,7 +746,6 @@ static void snd_wss_capture_format(struct snd_wss *chip, ...@@ -724,7 +746,6 @@ static void snd_wss_capture_format(struct snd_wss *chip,
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
snd_wss_mce_down(chip); snd_wss_mce_down(chip);
} }
snd_wss_calibrate_mute(chip, 0);
mutex_unlock(&chip->mce_mutex); mutex_unlock(&chip->mce_mutex);
} }
...@@ -781,6 +802,7 @@ static void snd_wss_init(struct snd_wss *chip) ...@@ -781,6 +802,7 @@ static void snd_wss_init(struct snd_wss *chip)
{ {
unsigned long flags; unsigned long flags;
snd_wss_calibrate_mute(chip, 1);
snd_wss_mce_down(chip); snd_wss_mce_down(chip);
#ifdef SNDRV_DEBUG_MCE #ifdef SNDRV_DEBUG_MCE
...@@ -804,6 +826,8 @@ static void snd_wss_init(struct snd_wss *chip) ...@@ -804,6 +826,8 @@ static void snd_wss_init(struct snd_wss *chip)
snd_wss_mce_up(chip); snd_wss_mce_up(chip);
spin_lock_irqsave(&chip->reg_lock, flags); spin_lock_irqsave(&chip->reg_lock, flags);
chip->image[CS4231_IFACE_CTRL] &= ~CS4231_AUTOCALIB;
snd_wss_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
snd_wss_out(chip, snd_wss_out(chip,
CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]); CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
...@@ -837,6 +861,7 @@ static void snd_wss_init(struct snd_wss *chip) ...@@ -837,6 +861,7 @@ static void snd_wss_init(struct snd_wss *chip)
chip->image[CS4231_REC_FORMAT]); chip->image[CS4231_REC_FORMAT]);
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
snd_wss_mce_down(chip); snd_wss_mce_down(chip);
snd_wss_calibrate_mute(chip, 0);
#ifdef SNDRV_DEBUG_MCE #ifdef SNDRV_DEBUG_MCE
snd_printk(KERN_DEBUG "init: (5)\n"); snd_printk(KERN_DEBUG "init: (5)\n");
...@@ -895,8 +920,6 @@ static void snd_wss_close(struct snd_wss *chip, unsigned int mode) ...@@ -895,8 +920,6 @@ static void snd_wss_close(struct snd_wss *chip, unsigned int mode)
mutex_unlock(&chip->open_mutex); mutex_unlock(&chip->open_mutex);
return; return;
} }
snd_wss_calibrate_mute(chip, 1);
/* disable IRQ */ /* disable IRQ */
spin_lock_irqsave(&chip->reg_lock, flags); spin_lock_irqsave(&chip->reg_lock, flags);
if (!(chip->hardware & WSS_HW_AD1848_MASK)) if (!(chip->hardware & WSS_HW_AD1848_MASK))
...@@ -929,8 +952,6 @@ static void snd_wss_close(struct snd_wss *chip, unsigned int mode) ...@@ -929,8 +952,6 @@ static void snd_wss_close(struct snd_wss *chip, unsigned int mode)
wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */ wss_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
spin_unlock_irqrestore(&chip->reg_lock, flags); spin_unlock_irqrestore(&chip->reg_lock, flags);
snd_wss_calibrate_mute(chip, 0);
chip->mode = 0; chip->mode = 0;
mutex_unlock(&chip->open_mutex); mutex_unlock(&chip->open_mutex);
} }
...@@ -1123,7 +1144,7 @@ irqreturn_t snd_wss_interrupt(int irq, void *dev_id) ...@@ -1123,7 +1144,7 @@ irqreturn_t snd_wss_interrupt(int irq, void *dev_id)
if (chip->hardware & WSS_HW_AD1848_MASK) if (chip->hardware & WSS_HW_AD1848_MASK)
wss_outb(chip, CS4231P(STATUS), 0); wss_outb(chip, CS4231P(STATUS), 0);
else else
snd_wss_outm(chip, CS4231_IRQ_STATUS, status, 0); snd_wss_out(chip, CS4231_IRQ_STATUS, status);
spin_unlock(&chip->reg_lock); spin_unlock(&chip->reg_lock);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
...@@ -1325,6 +1346,10 @@ static int snd_wss_probe(struct snd_wss *chip) ...@@ -1325,6 +1346,10 @@ static int snd_wss_probe(struct snd_wss *chip)
chip->image[CS4231_ALT_FEATURE_2] = chip->image[CS4231_ALT_FEATURE_2] =
chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01; chip->hardware == WSS_HW_INTERWAVE ? 0xc2 : 0x01;
} }
/* enable fine grained frequency selection */
if (chip->hardware == WSS_HW_AD1845)
chip->image[AD1845_PWR_DOWN] = 8;
ptr = (unsigned char *) &chip->image; ptr = (unsigned char *) &chip->image;
regnum = (chip->hardware & WSS_HW_AD1848_MASK) ? 16 : 32; regnum = (chip->hardware & WSS_HW_AD1848_MASK) ? 16 : 32;
snd_wss_mce_down(chip); snd_wss_mce_down(chip);
......
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