Commit d0c550dc authored by John Crispin's avatar John Crispin

MIPS: lantiq: add GPHY clock gate bits

Explicitly enable the clock gate of the internal GPHYs found on xrx200.
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4816/
parent 740c606e
...@@ -78,10 +78,19 @@ static struct ltq_xrx200_gphy_reset { ...@@ -78,10 +78,19 @@ static struct ltq_xrx200_gphy_reset {
/* reset and boot a gphy. these phys only exist on xrx200 SoC */ /* reset and boot a gphy. these phys only exist on xrx200 SoC */
int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr) int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
{ {
struct clk *clk;
if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) { if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
dev_err(dev, "this SoC has no GPHY\n"); dev_err(dev, "this SoC has no GPHY\n");
return -EINVAL; return -EINVAL;
} }
clk = clk_get_sys("1f203000.rcu", "gphy");
if (IS_ERR(clk))
return PTR_ERR(clk);
clk_enable(clk);
if (id > 1) { if (id > 1) {
dev_err(dev, "%u is an invalid gphy id\n", id); dev_err(dev, "%u is an invalid gphy id\n", id);
return -EINVAL; return -EINVAL;
......
...@@ -376,6 +376,7 @@ void __init ltq_soc_init(void) ...@@ -376,6 +376,7 @@ void __init ltq_soc_init(void)
PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
PMU_PPE_QSB | PMU_PPE_TOP); PMU_PPE_QSB | PMU_PPE_TOP);
clkdev_add_pmu("1f203000.rcu", "gphy", 0, PMU_GPHY);
} else if (of_machine_is_compatible("lantiq,ar9")) { } else if (of_machine_is_compatible("lantiq,ar9")) {
clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
ltq_ar9_fpi_hz(), CLOCK_250M); ltq_ar9_fpi_hz(), CLOCK_250M);
......
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