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nexedi
linux
Commits
d31be407
Commit
d31be407
authored
Oct 24, 2004
by
Bartlomiej Zolnierkiewicz
Browse files
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Plain Diff
[ide] pdc202xx_old: kill /proc/ide/pdc202xx
Signed-off-by:
Bartlomiej Zolnierkiewicz
<
bzolnier@gmail.com
>
parent
66f681fd
Changes
2
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2 changed files
with
3 additions
and
164 deletions
+3
-164
drivers/ide/pci/pdc202xx_old.c
drivers/ide/pci/pdc202xx_old.c
+3
-127
drivers/ide/pci/pdc202xx_old.h
drivers/ide/pci/pdc202xx_old.h
+0
-37
No files found.
drivers/ide/pci/pdc202xx_old.c
View file @
d31be407
...
@@ -50,68 +50,14 @@
...
@@ -50,68 +50,14 @@
#define PDC202_DEBUG_CABLE 0
#define PDC202_DEBUG_CABLE 0
#if defined(DISPLAY_PDC202XX_TIMINGS) && defined(CONFIG_PROC_FS)
#if 0
#include <linux/stat.h>
#include <linux/proc_fs.h>
static
u8
pdc202xx_proc
=
0
;
#define PDC202_MAX_DEVS 5
static
struct
pci_dev
*
pdc202_devs
[
PDC202_MAX_DEVS
];
static
int
n_pdc202_devs
;
static
char
*
pdc202xx_info
(
char
*
buf
,
struct
pci_dev
*
dev
)
{
char
*
p
=
buf
;
unsigned long bibma = pci_resource_start(dev, 4);
unsigned long bibma = pci_resource_start(dev, 4);
u32
reg60h
=
0
,
reg64h
=
0
,
reg68h
=
0
,
reg6ch
=
0
;
u16
reg50h
=
0
,
pmask
=
(
1
<<
10
),
smask
=
(
1
<<
11
);
u8 hi = 0, lo = 0;
u8 hi = 0, lo = 0;
/*
* at that point bibma+0x2 et bibma+0xa are byte registers
* to investigate:
*/
u8
c0
=
inb_p
((
u16
)
bibma
+
0x02
);
u8
c1
=
inb_p
((
u16
)
bibma
+
0x0a
);
u8
sc11
=
inb_p
((
u16
)
bibma
+
0x11
);
u8
sc1a
=
inb_p
((
u16
)
bibma
+
0x1a
);
u8
sc1b
=
inb_p
((
u16
)
bibma
+
0x1b
);
u8 sc1c = inb_p((u16)bibma + 0x1c);
u8 sc1c = inb_p((u16)bibma + 0x1c);
u8
sc1d
=
inb_p
((
u16
)
bibma
+
0x1d
);
u8 sc1e = inb_p((u16)bibma + 0x1e);
u8 sc1e = inb_p((u16)bibma + 0x1e);
u8 sc1f = inb_p((u16)bibma + 0x1f);
u8 sc1f = inb_p((u16)bibma + 0x1f);
pci_read_config_word
(
dev
,
0x50
,
&
reg50h
);
pci_read_config_dword
(
dev
,
0x60
,
&
reg60h
);
pci_read_config_dword
(
dev
,
0x64
,
&
reg64h
);
pci_read_config_dword
(
dev
,
0x68
,
&
reg68h
);
pci_read_config_dword
(
dev
,
0x6c
,
&
reg6ch
);
p
+=
sprintf
(
p
,
"
\n
"
);
switch
(
dev
->
device
)
{
case
PCI_DEVICE_ID_PROMISE_20267
:
p
+=
sprintf
(
p
,
"Ultra100"
);
break
;
case
PCI_DEVICE_ID_PROMISE_20265
:
p
+=
sprintf
(
p
,
"Ultra100 on M/B"
);
break
;
case
PCI_DEVICE_ID_PROMISE_20263
:
p
+=
sprintf
(
p
,
"FastTrak 66"
);
break
;
case
PCI_DEVICE_ID_PROMISE_20262
:
p
+=
sprintf
(
p
,
"Ultra66"
);
break
;
case
PCI_DEVICE_ID_PROMISE_20246
:
p
+=
sprintf
(
p
,
"Ultra33"
);
reg50h
|=
0x0c00
;
break
;
default:
p
+=
sprintf
(
p
,
"Ultra Series"
);
break
;
}
p
+=
sprintf
(
p
,
" Chipset.
\n
"
);
p
+=
sprintf
(
p
,
"------------------------------- General Status "
"---------------------------------
\n
"
);
p
+=
sprintf
(
p
,
"Burst Mode : %sabled
\n
"
,
(
sc1f
&
0x01
)
?
"en"
:
"dis"
);
p += sprintf(p, "Host Mode : %s\n",
p += sprintf(p, "Host Mode : %s\n",
(sc1f & 0x08) ? "Tri-Stated" : "Normal");
(sc1f & 0x08) ? "Tri-Stated" : "Normal");
p += sprintf(p, "Bus Clocking : %s\n",
p += sprintf(p, "Bus Clocking : %s\n",
...
@@ -126,70 +72,7 @@ static char * pdc202xx_info (char *buf, struct pci_dev *dev)
...
@@ -126,70 +72,7 @@ static char * pdc202xx_info (char *buf, struct pci_dev *dev)
SPLIT_BYTE(sc1e, hi, lo);
SPLIT_BYTE(sc1e, hi, lo);
p += sprintf(p, "Status Polling Period : %d\n", hi);
p += sprintf(p, "Status Polling Period : %d\n", hi);
p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
p
+=
sprintf
(
p
,
"--------------- Primary Channel "
"---------------- Secondary Channel "
"-------------
\n
"
);
p
+=
sprintf
(
p
,
" %s %s
\n
"
,
(
c0
&
0x80
)
?
"disabled"
:
"enabled "
,
(
c1
&
0x80
)
?
"disabled"
:
"enabled "
);
p
+=
sprintf
(
p
,
"66 Clocking %s %s
\n
"
,
(
sc11
&
0x02
)
?
"enabled "
:
"disabled"
,
(
sc11
&
0x08
)
?
"enabled "
:
"disabled"
);
p
+=
sprintf
(
p
,
" Mode %s Mode %s
\n
"
,
(
sc1a
&
0x01
)
?
"MASTER"
:
"PCI "
,
(
sc1b
&
0x01
)
?
"MASTER"
:
"PCI "
);
p
+=
sprintf
(
p
,
" %s %s
\n
"
,
(
sc1d
&
0x08
)
?
"Error "
:
((
sc1d
&
0x05
)
==
0x05
)
?
"Not My INTR "
:
(
sc1d
&
0x04
)
?
"Interrupting"
:
(
sc1d
&
0x02
)
?
"FIFO Full "
:
(
sc1d
&
0x01
)
?
"FIFO Empty "
:
"????????????"
,
(
sc1d
&
0x80
)
?
"Error "
:
((
sc1d
&
0x50
)
==
0x50
)
?
"Not My INTR "
:
(
sc1d
&
0x40
)
?
"Interrupting"
:
(
sc1d
&
0x20
)
?
"FIFO Full "
:
(
sc1d
&
0x10
)
?
"FIFO Empty "
:
"????????????"
);
p
+=
sprintf
(
p
,
"--------------- drive0 --------- drive1 "
"-------- drive0 ---------- drive1 ------
\n
"
);
p
+=
sprintf
(
p
,
"DMA enabled: %s %s "
" %s %s
\n
"
,
(
c0
&
0x20
)
?
"yes"
:
"no "
,
(
c0
&
0x40
)
?
"yes"
:
"no "
,
(
c1
&
0x20
)
?
"yes"
:
"no "
,
(
c1
&
0x40
)
?
"yes"
:
"no "
);
p
+=
sprintf
(
p
,
"DMA Mode: %s %s "
" %s %s
\n
"
,
pdc202xx_ultra_verbose
(
reg60h
,
(
reg50h
&
pmask
)),
pdc202xx_ultra_verbose
(
reg64h
,
(
reg50h
&
pmask
)),
pdc202xx_ultra_verbose
(
reg68h
,
(
reg50h
&
smask
)),
pdc202xx_ultra_verbose
(
reg6ch
,
(
reg50h
&
smask
)));
p
+=
sprintf
(
p
,
"PIO Mode: %s %s "
" %s %s
\n
"
,
pdc202xx_pio_verbose
(
reg60h
),
pdc202xx_pio_verbose
(
reg64h
),
pdc202xx_pio_verbose
(
reg68h
),
pdc202xx_pio_verbose
(
reg6ch
));
#if 0
p += sprintf(p, "--------------- Can ATAPI DMA ---------------\n");
#endif
#endif
return
(
char
*
)
p
;
}
static
int
pdc202xx_get_info
(
char
*
buffer
,
char
**
addr
,
off_t
offset
,
int
count
)
{
char
*
p
=
buffer
;
int
i
,
len
;
for
(
i
=
0
;
i
<
n_pdc202_devs
;
i
++
)
{
struct
pci_dev
*
dev
=
pdc202_devs
[
i
];
p
=
pdc202xx_info
(
buffer
,
dev
);
}
/* p - buffer must be less than 4k! */
len
=
(
p
-
buffer
)
-
offset
;
*
addr
=
buffer
+
offset
;
return
len
>
count
?
count
:
len
;
}
#endif
/* defined(DISPLAY_PDC202XX_TIMINGS) && defined(CONFIG_PROC_FS) */
static
u8
pdc202xx_ratemask
(
ide_drive_t
*
drive
)
static
u8
pdc202xx_ratemask
(
ide_drive_t
*
drive
)
{
{
...
@@ -546,11 +429,13 @@ static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
...
@@ -546,11 +429,13 @@ static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
u8
sc1d
=
hwif
->
INB
((
high_16
+
0x001d
));
u8
sc1d
=
hwif
->
INB
((
high_16
+
0x001d
));
if
(
hwif
->
channel
)
{
if
(
hwif
->
channel
)
{
/* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */
if
((
sc1d
&
0x50
)
==
0x50
)
if
((
sc1d
&
0x50
)
==
0x50
)
goto
somebody_else
;
goto
somebody_else
;
else
if
((
sc1d
&
0x40
)
==
0x40
)
else
if
((
sc1d
&
0x40
)
==
0x40
)
return
(
dma_stat
&
4
)
==
4
;
return
(
dma_stat
&
4
)
==
4
;
}
else
{
}
else
{
/* bit3: Error, bit2: Interrupting, bit1: FIFO Full, bit0: FIFO Empty */
if
((
sc1d
&
0x05
)
==
0x05
)
if
((
sc1d
&
0x05
)
==
0x05
)
goto
somebody_else
;
goto
somebody_else
;
else
if
((
sc1d
&
0x04
)
==
0x04
)
else
if
((
sc1d
&
0x04
)
==
0x04
)
...
@@ -668,15 +553,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const c
...
@@ -668,15 +553,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const c
name
,
dev
->
resource
[
PCI_ROM_RESOURCE
].
start
);
name
,
dev
->
resource
[
PCI_ROM_RESOURCE
].
start
);
}
}
#if defined(DISPLAY_PDC202XX_TIMINGS) && defined(CONFIG_PROC_FS)
pdc202_devs
[
n_pdc202_devs
++
]
=
dev
;
if
(
!
pdc202xx_proc
)
{
pdc202xx_proc
=
1
;
ide_pci_create_host_proc
(
"pdc202xx"
,
pdc202xx_get_info
);
}
#endif
/* DISPLAY_PDC202XX_TIMINGS && CONFIG_PROC_FS */
/*
/*
* software reset - this is required because the bios
* software reset - this is required because the bios
* will set UDMA timing on if the hdd supports it. The
* will set UDMA timing on if the hdd supports it. The
...
...
drivers/ide/pci/pdc202xx_old.h
View file @
d31be407
...
@@ -23,41 +23,6 @@ static const char *pdc_quirk_drives[] = {
...
@@ -23,41 +23,6 @@ static const char *pdc_quirk_drives[] = {
NULL
NULL
};
};
static
inline
u8
*
pdc202xx_pio_verbose
(
u32
drive_pci
)
{
if
((
drive_pci
&
0x000ff000
)
==
0x000ff000
)
return
(
"NOTSET"
);
if
((
drive_pci
&
0x00000401
)
==
0x00000401
)
return
(
"PIO 4"
);
if
((
drive_pci
&
0x00000602
)
==
0x00000602
)
return
(
"PIO 3"
);
if
((
drive_pci
&
0x00000803
)
==
0x00000803
)
return
(
"PIO 2"
);
if
((
drive_pci
&
0x00000C05
)
==
0x00000C05
)
return
(
"PIO 1"
);
if
((
drive_pci
&
0x00001309
)
==
0x00001309
)
return
(
"PIO 0"
);
return
(
"PIO ?"
);
}
static
inline
u8
*
pdc202xx_dma_verbose
(
u32
drive_pci
)
{
if
((
drive_pci
&
0x00036000
)
==
0x00036000
)
return
(
"MWDMA 2"
);
if
((
drive_pci
&
0x00046000
)
==
0x00046000
)
return
(
"MWDMA 1"
);
if
((
drive_pci
&
0x00056000
)
==
0x00056000
)
return
(
"MWDMA 0"
);
if
((
drive_pci
&
0x00056000
)
==
0x00056000
)
return
(
"SWDMA 2"
);
if
((
drive_pci
&
0x00068000
)
==
0x00068000
)
return
(
"SWDMA 1"
);
if
((
drive_pci
&
0x000BC000
)
==
0x000BC000
)
return
(
"SWDMA 0"
);
return
(
"PIO---"
);
}
static
inline
u8
*
pdc202xx_ultra_verbose
(
u32
drive_pci
,
u16
slow_cable
)
{
if
((
drive_pci
&
0x000ff000
)
==
0x000ff000
)
return
(
"NOTSET"
);
if
((
drive_pci
&
0x00012000
)
==
0x00012000
)
return
((
slow_cable
)
?
"UDMA 2"
:
"UDMA 4"
);
if
((
drive_pci
&
0x00024000
)
==
0x00024000
)
return
((
slow_cable
)
?
"UDMA 1"
:
"UDMA 3"
);
if
((
drive_pci
&
0x00036000
)
==
0x00036000
)
return
(
"UDMA 0"
);
return
(
pdc202xx_dma_verbose
(
drive_pci
));
}
/* A Register */
/* A Register */
#define SYNC_ERRDY_EN 0xC0
#define SYNC_ERRDY_EN 0xC0
...
@@ -98,8 +63,6 @@ static inline u8 *pdc202xx_ultra_verbose (u32 drive_pci, u16 slow_cable)
...
@@ -98,8 +63,6 @@ static inline u8 *pdc202xx_ultra_verbose (u32 drive_pci, u16 slow_cable)
#define MC1 0x02
/* DMA"C" timing */
#define MC1 0x02
/* DMA"C" timing */
#define MC0 0x01
/* DMA"C" timing */
#define MC0 0x01
/* DMA"C" timing */
#define DISPLAY_PDC202XX_TIMINGS
static
void
init_setup_pdc202ata4
(
struct
pci_dev
*
dev
,
ide_pci_device_t
*
d
);
static
void
init_setup_pdc202ata4
(
struct
pci_dev
*
dev
,
ide_pci_device_t
*
d
);
static
void
init_setup_pdc20265
(
struct
pci_dev
*
,
ide_pci_device_t
*
);
static
void
init_setup_pdc20265
(
struct
pci_dev
*
,
ide_pci_device_t
*
);
static
void
init_setup_pdc202xx
(
struct
pci_dev
*
,
ide_pci_device_t
*
);
static
void
init_setup_pdc202xx
(
struct
pci_dev
*
,
ide_pci_device_t
*
);
...
...
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