Commit d3901eaf authored by Tarun Kanti DebBarma's avatar Tarun Kanti DebBarma

gpio/omap: remove unnecessary bit-masking for read access

Remove un-necessary bit masking. Since the register are 4 byte aligned
and readl would work as is. The 'enabled' mask is already taking care
to mask for bank width.
Signed-off-by: default avatarCharulatha V <charu@ti.com>
Signed-off-by: default avatarTarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent fad96ea8
...@@ -576,9 +576,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) ...@@ -576,9 +576,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
enabled = _get_gpio_irqbank_mask(bank); enabled = _get_gpio_irqbank_mask(bank);
isr_saved = isr = __raw_readl(isr_reg) & enabled; isr_saved = isr = __raw_readl(isr_reg) & enabled;
if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
isr &= 0x0000ffff;
if (bank->level_mask) if (bank->level_mask)
level_mask = bank->level_mask & enabled; level_mask = bank->level_mask & enabled;
......
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