Commit d45171ac authored by Chris Wilson's avatar Chris Wilson

drm/i915/gt: Trace placement of timeline HWSP

Track the position of the HWSP for each timeline.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/2169Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200714135002.17508-1-chris@chris-wilson.co.uk
parent 3e6761fd
...@@ -73,6 +73,8 @@ hwsp_alloc(struct intel_timeline *timeline, unsigned int *cacheline) ...@@ -73,6 +73,8 @@ hwsp_alloc(struct intel_timeline *timeline, unsigned int *cacheline)
return vma; return vma;
} }
GT_TRACE(timeline->gt, "new HWSP allocated\n");
vma->private = hwsp; vma->private = hwsp;
hwsp->gt = timeline->gt; hwsp->gt = timeline->gt;
hwsp->vma = vma; hwsp->vma = vma;
...@@ -327,6 +329,8 @@ int intel_timeline_pin(struct intel_timeline *tl) ...@@ -327,6 +329,8 @@ int intel_timeline_pin(struct intel_timeline *tl)
tl->hwsp_offset = tl->hwsp_offset =
i915_ggtt_offset(tl->hwsp_ggtt) + i915_ggtt_offset(tl->hwsp_ggtt) +
offset_in_page(tl->hwsp_offset); offset_in_page(tl->hwsp_offset);
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
cacheline_acquire(tl->hwsp_cacheline); cacheline_acquire(tl->hwsp_cacheline);
if (atomic_fetch_inc(&tl->pin_count)) { if (atomic_fetch_inc(&tl->pin_count)) {
...@@ -434,6 +438,7 @@ __intel_timeline_get_seqno(struct intel_timeline *tl, ...@@ -434,6 +438,7 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
int err; int err;
might_lock(&tl->gt->ggtt->vm.mutex); might_lock(&tl->gt->ggtt->vm.mutex);
GT_TRACE(tl->gt, "timeline:%llx wrapped\n", tl->fence_context);
/* /*
* If there is an outstanding GPU reference to this cacheline, * If there is an outstanding GPU reference to this cacheline,
...@@ -497,6 +502,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl, ...@@ -497,6 +502,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
memset(vaddr + tl->hwsp_offset, 0, CACHELINE_BYTES); memset(vaddr + tl->hwsp_offset, 0, CACHELINE_BYTES);
tl->hwsp_offset += i915_ggtt_offset(vma); tl->hwsp_offset += i915_ggtt_offset(vma);
GT_TRACE(tl->gt, "timeline:%llx using HWSP offset:%x\n",
tl->fence_context, tl->hwsp_offset);
cacheline_acquire(cl); cacheline_acquire(cl);
tl->hwsp_cacheline = cl; tl->hwsp_cacheline = cl;
......
...@@ -562,8 +562,9 @@ static int live_hwsp_engine(void *arg) ...@@ -562,8 +562,9 @@ static int live_hwsp_engine(void *arg)
struct intel_timeline *tl = timelines[n]; struct intel_timeline *tl = timelines[n];
if (!err && *tl->hwsp_seqno != n) { if (!err && *tl->hwsp_seqno != n) {
pr_err("Invalid seqno stored in timeline %lu, found 0x%x\n", pr_err("Invalid seqno stored in timeline %lu @ %x, found 0x%x\n",
n, *tl->hwsp_seqno); n, tl->hwsp_offset, *tl->hwsp_seqno);
GEM_TRACE_DUMP();
err = -EINVAL; err = -EINVAL;
} }
intel_timeline_put(tl); intel_timeline_put(tl);
...@@ -633,8 +634,9 @@ static int live_hwsp_alternate(void *arg) ...@@ -633,8 +634,9 @@ static int live_hwsp_alternate(void *arg)
struct intel_timeline *tl = timelines[n]; struct intel_timeline *tl = timelines[n];
if (!err && *tl->hwsp_seqno != n) { if (!err && *tl->hwsp_seqno != n) {
pr_err("Invalid seqno stored in timeline %lu, found 0x%x\n", pr_err("Invalid seqno stored in timeline %lu @ %x, found 0x%x\n",
n, *tl->hwsp_seqno); n, tl->hwsp_offset, *tl->hwsp_seqno);
GEM_TRACE_DUMP();
err = -EINVAL; err = -EINVAL;
} }
intel_timeline_put(tl); intel_timeline_put(tl);
...@@ -965,8 +967,9 @@ static int live_hwsp_recycle(void *arg) ...@@ -965,8 +967,9 @@ static int live_hwsp_recycle(void *arg)
} }
if (*tl->hwsp_seqno != count) { if (*tl->hwsp_seqno != count) {
pr_err("Invalid seqno stored in timeline %lu, found 0x%x\n", pr_err("Invalid seqno stored in timeline %lu @ tl->hwsp_offset, found 0x%x\n",
count, *tl->hwsp_seqno); count, *tl->hwsp_seqno);
GEM_TRACE_DUMP();
err = -EINVAL; err = -EINVAL;
} }
......
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