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Commit d5752b9b authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/pm: rename from perfmon (no binary change) 

Switch to NVIDIA's name for the device.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent b8bf04e1
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Inline Side-by-side
Showing with 336 additions and 207 deletions
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View file @ d5752b9b
...@@ -58,7 +58,7 @@ enum nv_subdev_type { ...@@ -58,7 +58,7 @@ enum nv_subdev_type {
NVDEV_ENGINE_VIC, NVDEV_ENGINE_VIC,
NVDEV_ENGINE_VENC, NVDEV_ENGINE_VENC,
NVDEV_ENGINE_DISP, NVDEV_ENGINE_DISP,
NVDEV_ENGINE_PERFMON, NVDEV_ENGINE_PM,
NVDEV_ENGINE_MSVLD, NVDEV_ENGINE_MSVLD,
NVDEV_ENGINE_SEC, NVDEV_ENGINE_SEC,
......
drivers/gpu/drm/nouveau/include/nvkm/engine/perfmon.h → drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h
View file @ d5752b9b
#ifndef __NVKM_PERFMON_H__ #ifndef __NVKM_PM_H__
#define __NVKM_PERFMON_H__ #define __NVKM_PM_H__
#include <core/device.h> #include <core/device.h>
#include <core/engine.h> #include <core/engine.h>
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
struct nouveau_perfdom; struct nouveau_perfdom;
struct nouveau_perfctr; struct nouveau_perfctr;
struct nouveau_perfmon { struct nouveau_pm {
struct nouveau_engine base; struct nouveau_engine base;
struct nouveau_perfctx *context; struct nouveau_perfctx *context;
...@@ -21,18 +21,18 @@ struct nouveau_perfmon { ...@@ -21,18 +21,18 @@ struct nouveau_perfmon {
u32 last; u32 last;
}; };
static inline struct nouveau_perfmon * static inline struct nouveau_pm *
nouveau_perfmon(void *obj) nouveau_pm(void *obj)
{ {
return (void *)nouveau_engine(obj, NVDEV_ENGINE_PERFMON); return (void *)nouveau_engine(obj, NVDEV_ENGINE_PM);
} }
extern struct nouveau_oclass *nv40_perfmon_oclass; extern struct nouveau_oclass *nv40_pm_oclass;
extern struct nouveau_oclass *nv50_perfmon_oclass; extern struct nouveau_oclass *nv50_pm_oclass;
extern struct nouveau_oclass *nv84_perfmon_oclass; extern struct nouveau_oclass *nv84_pm_oclass;
extern struct nouveau_oclass *nva3_perfmon_oclass; extern struct nouveau_oclass *nva3_pm_oclass;
extern struct nouveau_oclass nvc0_perfmon_oclass; extern struct nouveau_oclass nvc0_pm_oclass;
extern struct nouveau_oclass nve0_perfmon_oclass; extern struct nouveau_oclass nve0_pm_oclass;
extern struct nouveau_oclass nvf0_perfmon_oclass; extern struct nouveau_oclass nvf0_pm_oclass;
#endif #endif
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
View file @ d5752b9b
...@@ -11,7 +11,7 @@ include $(src)/nvkm/engine/fifo/Kbuild ...@@ -11,7 +11,7 @@ include $(src)/nvkm/engine/fifo/Kbuild
include $(src)/nvkm/engine/gr/Kbuild include $(src)/nvkm/engine/gr/Kbuild
include $(src)/nvkm/engine/mpeg/Kbuild include $(src)/nvkm/engine/mpeg/Kbuild
include $(src)/nvkm/engine/msvld/Kbuild include $(src)/nvkm/engine/msvld/Kbuild
include $(src)/nvkm/engine/perfmon/Kbuild include $(src)/nvkm/engine/pm/Kbuild
include $(src)/nvkm/engine/ppp/Kbuild include $(src)/nvkm/engine/ppp/Kbuild
include $(src)/nvkm/engine/sec/Kbuild include $(src)/nvkm/engine/sec/Kbuild
include $(src)/nvkm/engine/software/Kbuild include $(src)/nvkm/engine/software/Kbuild
......
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View file @ d5752b9b
...@@ -225,7 +225,7 @@ static const u64 disable_map[] = { ...@@ -225,7 +225,7 @@ static const u64 disable_map[] = {
[NVDEV_SUBDEV_PMU] = NV_DEVICE_V0_DISABLE_CORE, [NVDEV_SUBDEV_PMU] = NV_DEVICE_V0_DISABLE_CORE,
[NVDEV_SUBDEV_FUSE] = NV_DEVICE_V0_DISABLE_CORE, [NVDEV_SUBDEV_FUSE] = NV_DEVICE_V0_DISABLE_CORE,
[NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_V0_DISABLE_CORE, [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_V0_DISABLE_CORE,
[NVDEV_ENGINE_PERFMON] = NV_DEVICE_V0_DISABLE_CORE, [NVDEV_ENGINE_PM ] = NV_DEVICE_V0_DISABLE_CORE,
[NVDEV_ENGINE_FIFO] = NV_DEVICE_V0_DISABLE_FIFO, [NVDEV_ENGINE_FIFO] = NV_DEVICE_V0_DISABLE_FIFO,
[NVDEV_ENGINE_SW] = NV_DEVICE_V0_DISABLE_FIFO, [NVDEV_ENGINE_SW] = NV_DEVICE_V0_DISABLE_FIFO,
[NVDEV_ENGINE_GR] = NV_DEVICE_V0_DISABLE_GR, [NVDEV_ENGINE_GR] = NV_DEVICE_V0_DISABLE_GR,
...@@ -319,7 +319,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, ...@@ -319,7 +319,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
(1ULL << NVDEV_ENGINE_DMAOBJ) | (1ULL << NVDEV_ENGINE_DMAOBJ) |
(1ULL << NVDEV_ENGINE_FIFO) | (1ULL << NVDEV_ENGINE_FIFO) |
(1ULL << NVDEV_ENGINE_DISP) | (1ULL << NVDEV_ENGINE_DISP) |
(1ULL << NVDEV_ENGINE_PERFMON), &devobj); (1ULL << NVDEV_ENGINE_PM ), &devobj);
*pobject = nv_object(devobj); *pobject = nv_object(devobj);
if (ret) if (ret)
return ret; return ret;
......
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
View file @ d5752b9b
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
#include <engine/msvld.h> #include <engine/msvld.h>
#include <engine/vp.h> #include <engine/vp.h>
#include <engine/ppp.h> #include <engine/ppp.h>
#include <engine/perfmon.h> #include <engine/pm.h>
int int
gm100_identify(struct nouveau_device *device) gm100_identify(struct nouveau_device *device)
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
View file @ d5752b9b
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
#include <engine/gr.h> #include <engine/gr.h>
#include <engine/mpeg.h> #include <engine/mpeg.h>
#include <engine/disp.h> #include <engine/disp.h>
#include <engine/perfmon.h> #include <engine/pm.h>
int int
nv40_identify(struct nouveau_device *device) nv40_identify(struct nouveau_device *device)
...@@ -71,7 +71,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -71,7 +71,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x41: case 0x41:
device->cname = "NV41"; device->cname = "NV41";
...@@ -94,7 +94,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -94,7 +94,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x42: case 0x42:
device->cname = "NV42"; device->cname = "NV42";
...@@ -117,7 +117,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -117,7 +117,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x43: case 0x43:
device->cname = "NV43"; device->cname = "NV43";
...@@ -140,7 +140,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -140,7 +140,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x45: case 0x45:
device->cname = "NV45"; device->cname = "NV45";
...@@ -163,7 +163,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -163,7 +163,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x47: case 0x47:
device->cname = "G70"; device->cname = "G70";
...@@ -186,7 +186,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -186,7 +186,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x49: case 0x49:
device->cname = "G71"; device->cname = "G71";
...@@ -209,7 +209,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -209,7 +209,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x4b: case 0x4b:
device->cname = "G73"; device->cname = "G73";
...@@ -232,7 +232,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -232,7 +232,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x44: case 0x44:
device->cname = "NV44"; device->cname = "NV44";
...@@ -255,7 +255,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -255,7 +255,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x46: case 0x46:
device->cname = "G72"; device->cname = "G72";
...@@ -278,7 +278,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -278,7 +278,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x4a: case 0x4a:
device->cname = "NV44A"; device->cname = "NV44A";
...@@ -301,7 +301,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -301,7 +301,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x4c: case 0x4c:
device->cname = "C61"; device->cname = "C61";
...@@ -324,7 +324,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -324,7 +324,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x4e: case 0x4e:
device->cname = "C51"; device->cname = "C51";
...@@ -347,7 +347,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -347,7 +347,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x63: case 0x63:
device->cname = "C73"; device->cname = "C73";
...@@ -370,7 +370,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -370,7 +370,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x67: case 0x67:
device->cname = "C67"; device->cname = "C67";
...@@ -393,7 +393,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -393,7 +393,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
case 0x68: case 0x68:
device->cname = "C68"; device->cname = "C68";
...@@ -416,7 +416,7 @@ nv40_identify(struct nouveau_device *device) ...@@ -416,7 +416,7 @@ nv40_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv40_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv40_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
break; break;
default: default:
nv_fatal(device, "unknown Curie chipset\n"); nv_fatal(device, "unknown Curie chipset\n");
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
View file @ d5752b9b
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
#include <engine/ppp.h> #include <engine/ppp.h>
#include <engine/ce.h> #include <engine/ce.h>
#include <engine/disp.h> #include <engine/disp.h>
#include <engine/perfmon.h> #include <engine/pm.h>
int int
nv50_identify(struct nouveau_device *device) nv50_identify(struct nouveau_device *device)
...@@ -84,7 +84,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -84,7 +84,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv50_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv50_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv50_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass;
break; break;
case 0x84: case 0x84:
device->cname = "G84"; device->cname = "G84";
...@@ -113,7 +113,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -113,7 +113,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0x86: case 0x86:
device->cname = "G86"; device->cname = "G86";
...@@ -142,7 +142,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -142,7 +142,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0x92: case 0x92:
device->cname = "G92"; device->cname = "G92";
...@@ -171,7 +171,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -171,7 +171,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0x94: case 0x94:
device->cname = "G94"; device->cname = "G94";
...@@ -200,7 +200,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -200,7 +200,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0x96: case 0x96:
device->cname = "G96"; device->cname = "G96";
...@@ -229,7 +229,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -229,7 +229,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0x98: case 0x98:
device->cname = "G98"; device->cname = "G98";
...@@ -258,7 +258,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -258,7 +258,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0xa0: case 0xa0:
device->cname = "G200"; device->cname = "G200";
...@@ -287,7 +287,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -287,7 +287,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva0_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva0_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0xaa: case 0xaa:
device->cname = "MCP77/MCP78"; device->cname = "MCP77/MCP78";
...@@ -316,7 +316,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -316,7 +316,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0xac: case 0xac:
device->cname = "MCP79/MCP7A"; device->cname = "MCP79/MCP7A";
...@@ -345,7 +345,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -345,7 +345,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nv98_msvld_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nv84_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
break; break;
case 0xa3: case 0xa3:
device->cname = "GT215"; device->cname = "GT215";
...@@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nva3_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
break; break;
case 0xa5: case 0xa5:
device->cname = "GT216"; device->cname = "GT216";
...@@ -406,7 +406,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -406,7 +406,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nva3_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
break; break;
case 0xa8: case 0xa8:
device->cname = "GT218"; device->cname = "GT218";
...@@ -436,7 +436,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -436,7 +436,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nva3_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
break; break;
case 0xaf: case 0xaf:
device->cname = "MCP89"; device->cname = "MCP89";
...@@ -466,7 +466,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -466,7 +466,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nv98_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nva3_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = nva3_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
break; break;
default: default:
nv_fatal(device, "unknown Tesla chipset\n"); nv_fatal(device, "unknown Tesla chipset\n");
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
View file @ d5752b9b
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
#include <engine/ppp.h> #include <engine/ppp.h>
#include <engine/ce.h> #include <engine/ce.h>
#include <engine/disp.h> #include <engine/disp.h>
#include <engine/perfmon.h> #include <engine/pm.h>
int int
nvc0_identify(struct nouveau_device *device) nvc0_identify(struct nouveau_device *device)
...@@ -90,7 +90,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -90,7 +90,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xc4: case 0xc4:
device->cname = "GF104"; device->cname = "GF104";
...@@ -123,7 +123,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -123,7 +123,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xc3: case 0xc3:
device->cname = "GF106"; device->cname = "GF106";
...@@ -155,7 +155,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -155,7 +155,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xce: case 0xce:
device->cname = "GF114"; device->cname = "GF114";
...@@ -188,7 +188,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -188,7 +188,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xcf: case 0xcf:
device->cname = "GF116"; device->cname = "GF116";
...@@ -220,7 +220,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -220,7 +220,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xc1: case 0xc1:
device->cname = "GF108"; device->cname = "GF108";
...@@ -252,7 +252,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -252,7 +252,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xc8: case 0xc8:
device->cname = "GF110"; device->cname = "GF110";
...@@ -285,7 +285,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -285,7 +285,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &nvc0_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva3_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xd9: case 0xd9:
device->cname = "GF119"; device->cname = "GF119";
...@@ -317,7 +317,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -317,7 +317,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nvd0_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvd0_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
case 0xd7: case 0xd7:
device->cname = "GF117"; device->cname = "GF117";
...@@ -347,7 +347,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -347,7 +347,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass; device->oclass[NVDEV_ENGINE_CE0 ] = &nvc0_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = nvd0_disp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nvd0_disp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvc0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
break; break;
default: default:
nv_fatal(device, "unknown Fermi chipset\n"); nv_fatal(device, "unknown Fermi chipset\n");
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
View file @ d5752b9b
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
#include <engine/msvld.h> #include <engine/msvld.h>
#include <engine/vp.h> #include <engine/vp.h>
#include <engine/ppp.h> #include <engine/ppp.h>
#include <engine/perfmon.h> #include <engine/pm.h>
int int
nve0_identify(struct nouveau_device *device) nve0_identify(struct nouveau_device *device)
...@@ -91,7 +91,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -91,7 +91,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
break; break;
case 0xe7: case 0xe7:
device->cname = "GK107"; device->cname = "GK107";
...@@ -125,7 +125,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -125,7 +125,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
break; break;
case 0xe6: case 0xe6:
device->cname = "GK106"; device->cname = "GK106";
...@@ -159,7 +159,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -159,7 +159,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
break; break;
case 0xea: case 0xea:
device->cname = "GK20A"; device->cname = "GK20A";
...@@ -179,7 +179,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -179,7 +179,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass; device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &nve0_ce2_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &nve0_ce2_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass; device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
break; break;
...@@ -215,7 +215,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -215,7 +215,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass;
break; break;
case 0xf1: case 0xf1:
device->cname = "GK110B"; device->cname = "GK110B";
...@@ -249,7 +249,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -249,7 +249,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nve0_msvld_oclass;
device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass;
break; break;
case 0x106: case 0x106:
device->cname = "GK208B"; device->cname = "GK208B";
......
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/Kbuild deleted 100644 → 0
View file @ b8bf04e1
nvkm-y += nvkm/engine/perfmon/base.o
nvkm-y += nvkm/engine/perfmon/daemon.o
nvkm-y += nvkm/engine/perfmon/nv40.o
nvkm-y += nvkm/engine/perfmon/nv50.o
nvkm-y += nvkm/engine/perfmon/nv84.o
nvkm-y += nvkm/engine/perfmon/nva3.o
nvkm-y += nvkm/engine/perfmon/nvc0.o
nvkm-y += nvkm/engine/perfmon/nve0.o
nvkm-y += nvkm/engine/perfmon/nvf0.o
drivers/gpu/drm/nouveau/nvkm/engine/pm/Kbuild 0 → 100644
View file @ d5752b9b
nvkm-y += nvkm/engine/pm/base.o
nvkm-y += nvkm/engine/pm/daemon.o
nvkm-y += nvkm/engine/pm/nv40.o
nvkm-y += nvkm/engine/pm/nv50.o
nvkm-y += nvkm/engine/pm/nv84.o
nvkm-y += nvkm/engine/pm/nva3.o
nvkm-y += nvkm/engine/pm/nvc0.o
nvkm-y += nvkm/engine/pm/nve0.o
nvkm-y += nvkm/engine/pm/nvf0.o
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/base.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
View file @ d5752b9b
...@@ -59,7 +59,7 @@ nouveau_perfsig_find_(struct nouveau_perfdom *dom, const char *name, u32 size) ...@@ -59,7 +59,7 @@ nouveau_perfsig_find_(struct nouveau_perfdom *dom, const char *name, u32 size)
} }
struct nouveau_perfsig * struct nouveau_perfsig *
nouveau_perfsig_find(struct nouveau_perfmon *ppm, const char *name, u32 size, nouveau_perfsig_find(struct nouveau_pm *ppm, const char *name, u32 size,
struct nouveau_perfdom **pdom) struct nouveau_perfdom **pdom)
{ {
struct nouveau_perfdom *dom = *pdom; struct nouveau_perfdom *dom = *pdom;
...@@ -81,7 +81,7 @@ nouveau_perfsig_find(struct nouveau_perfmon *ppm, const char *name, u32 size, ...@@ -81,7 +81,7 @@ nouveau_perfsig_find(struct nouveau_perfmon *ppm, const char *name, u32 size,
} }
struct nouveau_perfctr * struct nouveau_perfctr *
nouveau_perfsig_wrap(struct nouveau_perfmon *ppm, const char *name, nouveau_perfsig_wrap(struct nouveau_pm *ppm, const char *name,
struct nouveau_perfdom **pdom) struct nouveau_perfdom **pdom)
{ {
struct nouveau_perfsig *sig; struct nouveau_perfsig *sig;
...@@ -110,7 +110,7 @@ nouveau_perfctr_query(struct nouveau_object *object, void *data, u32 size) ...@@ -110,7 +110,7 @@ nouveau_perfctr_query(struct nouveau_object *object, void *data, u32 size)
struct nvif_perfctr_query_v0 v0; struct nvif_perfctr_query_v0 v0;
} *args = data; } *args = data;
struct nouveau_device *device = nv_device(object); struct nouveau_device *device = nv_device(object);
struct nouveau_perfmon *ppm = (void *)object->engine; struct nouveau_pm *ppm = (void *)object->engine;
struct nouveau_perfdom *dom = NULL, *chk; struct nouveau_perfdom *dom = NULL, *chk;
const bool all = nouveau_boolopt(device->cfgopt, "NvPmShowAll", false); const bool all = nouveau_boolopt(device->cfgopt, "NvPmShowAll", false);
const bool raw = nouveau_boolopt(device->cfgopt, "NvPmUnnamed", all); const bool raw = nouveau_boolopt(device->cfgopt, "NvPmUnnamed", all);
...@@ -168,7 +168,7 @@ nouveau_perfctr_sample(struct nouveau_object *object, void *data, u32 size) ...@@ -168,7 +168,7 @@ nouveau_perfctr_sample(struct nouveau_object *object, void *data, u32 size)
union { union {
struct nvif_perfctr_sample none; struct nvif_perfctr_sample none;
} *args = data; } *args = data;
struct nouveau_perfmon *ppm = (void *)object->engine; struct nouveau_pm *ppm = (void *)object->engine;
struct nouveau_perfctr *ctr, *tmp; struct nouveau_perfctr *ctr, *tmp;
struct nouveau_perfdom *dom; struct nouveau_perfdom *dom;
int ret; int ret;
...@@ -273,7 +273,7 @@ nouveau_perfctr_ctor(struct nouveau_object *parent, ...@@ -273,7 +273,7 @@ nouveau_perfctr_ctor(struct nouveau_object *parent,
union { union {
struct nvif_perfctr_v0 v0; struct nvif_perfctr_v0 v0;
} *args = data; } *args = data;
struct nouveau_perfmon *ppm = (void *)engine; struct nouveau_pm *ppm = (void *)engine;
struct nouveau_perfdom *dom = NULL; struct nouveau_perfdom *dom = NULL;
struct nouveau_perfsig *sig[4] = {}; struct nouveau_perfsig *sig[4] = {};
struct nouveau_perfctr *ctr; struct nouveau_perfctr *ctr;
...@@ -321,7 +321,7 @@ nouveau_perfctr_ofuncs = { ...@@ -321,7 +321,7 @@ nouveau_perfctr_ofuncs = {
}; };
struct nouveau_oclass struct nouveau_oclass
nouveau_perfmon_sclass[] = { nouveau_pm_sclass[] = {
{ .handle = NVIF_IOCTL_NEW_V0_PERFCTR, { .handle = NVIF_IOCTL_NEW_V0_PERFCTR,
.ofuncs = &nouveau_perfctr_ofuncs, .ofuncs = &nouveau_perfctr_ofuncs,
}, },
...@@ -334,7 +334,7 @@ nouveau_perfmon_sclass[] = { ...@@ -334,7 +334,7 @@ nouveau_perfmon_sclass[] = {
static void static void
nouveau_perfctx_dtor(struct nouveau_object *object) nouveau_perfctx_dtor(struct nouveau_object *object)
{ {
struct nouveau_perfmon *ppm = (void *)object->engine; struct nouveau_pm *ppm = (void *)object->engine;
mutex_lock(&nv_subdev(ppm)->mutex); mutex_lock(&nv_subdev(ppm)->mutex);
nouveau_engctx_destroy(&ppm->context->base); nouveau_engctx_destroy(&ppm->context->base);
ppm->context = NULL; ppm->context = NULL;
...@@ -347,7 +347,7 @@ nouveau_perfctx_ctor(struct nouveau_object *parent, ...@@ -347,7 +347,7 @@ nouveau_perfctx_ctor(struct nouveau_object *parent,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nouveau_object **pobject)
{ {
struct nouveau_perfmon *ppm = (void *)engine; struct nouveau_pm *ppm = (void *)engine;
struct nouveau_perfctx *ctx; struct nouveau_perfctx *ctx;
int ret; int ret;
...@@ -369,8 +369,8 @@ nouveau_perfctx_ctor(struct nouveau_object *parent, ...@@ -369,8 +369,8 @@ nouveau_perfctx_ctor(struct nouveau_object *parent,
} }
struct nouveau_oclass struct nouveau_oclass
nouveau_perfmon_cclass = { nouveau_pm_cclass = {
.handle = NV_ENGCTX(PERFMON, 0x00), .handle = NV_ENGCTX(PM, 0x00),
.ofuncs = &(struct nouveau_ofuncs) { .ofuncs = &(struct nouveau_ofuncs) {
.ctor = nouveau_perfctx_ctor, .ctor = nouveau_perfctx_ctor,
.dtor = nouveau_perfctx_dtor, .dtor = nouveau_perfctx_dtor,
...@@ -383,7 +383,7 @@ nouveau_perfmon_cclass = { ...@@ -383,7 +383,7 @@ nouveau_perfmon_cclass = {
* PPM engine/subdev functions * PPM engine/subdev functions
******************************************************************************/ ******************************************************************************/
int int
nouveau_perfdom_new(struct nouveau_perfmon *ppm, const char *name, u32 mask, nouveau_perfdom_new(struct nouveau_pm *ppm, const char *name, u32 mask,
u32 base, u32 size_unit, u32 size_domain, u32 base, u32 size_unit, u32 size_domain,
const struct nouveau_specdom *spec) const struct nouveau_specdom *spec)
{ {
...@@ -436,23 +436,23 @@ nouveau_perfdom_new(struct nouveau_perfmon *ppm, const char *name, u32 mask, ...@@ -436,23 +436,23 @@ nouveau_perfdom_new(struct nouveau_perfmon *ppm, const char *name, u32 mask,
} }
int int
_nouveau_perfmon_fini(struct nouveau_object *object, bool suspend) _nouveau_pm_fini(struct nouveau_object *object, bool suspend)
{ {
struct nouveau_perfmon *ppm = (void *)object; struct nouveau_pm *ppm = (void *)object;
return nouveau_engine_fini(&ppm->base, suspend); return nouveau_engine_fini(&ppm->base, suspend);
} }
int int
_nouveau_perfmon_init(struct nouveau_object *object) _nouveau_pm_init(struct nouveau_object *object)
{ {
struct nouveau_perfmon *ppm = (void *)object; struct nouveau_pm *ppm = (void *)object;
return nouveau_engine_init(&ppm->base); return nouveau_engine_init(&ppm->base);
} }
void void
_nouveau_perfmon_dtor(struct nouveau_object *object) _nouveau_pm_dtor(struct nouveau_object *object)
{ {
struct nouveau_perfmon *ppm = (void *)object; struct nouveau_pm *ppm = (void *)object;
struct nouveau_perfdom *dom, *tmp; struct nouveau_perfdom *dom, *tmp;
list_for_each_entry_safe(dom, tmp, &ppm->domains, head) { list_for_each_entry_safe(dom, tmp, &ppm->domains, head) {
...@@ -464,16 +464,16 @@ _nouveau_perfmon_dtor(struct nouveau_object *object) ...@@ -464,16 +464,16 @@ _nouveau_perfmon_dtor(struct nouveau_object *object)
} }
int int
nouveau_perfmon_create_(struct nouveau_object *parent, nouveau_pm_create_(struct nouveau_object *parent,
struct nouveau_object *engine, struct nouveau_object *engine,
struct nouveau_oclass *oclass, struct nouveau_oclass *oclass,
int length, void **pobject) int length, void **pobject)
{ {
struct nouveau_perfmon *ppm; struct nouveau_pm *ppm;
int ret; int ret;
ret = nouveau_engine_create_(parent, engine, oclass, true, "PPM", ret = nouveau_engine_create_(parent, engine, oclass, true, "PPM",
"perfmon", length, pobject); "pm", length, pobject);
ppm = *pobject; ppm = *pobject;
if (ret) if (ret)
return ret; return ret;
......
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/daemon.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/daemon.c
View file @ d5752b9b
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
#include "priv.h" #include "priv.h"
static void static void
pwr_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, pwr_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
u32 mask = 0x00000000; u32 mask = 0x00000000;
...@@ -41,7 +41,7 @@ pwr_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -41,7 +41,7 @@ pwr_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
pwr_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, pwr_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
ctr->ctr = ppm->pwr[ctr->slot]; ctr->ctr = ppm->pwr[ctr->slot];
...@@ -49,7 +49,7 @@ pwr_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -49,7 +49,7 @@ pwr_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
pwr_perfctr_next(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom) pwr_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
{ {
int i; int i;
...@@ -67,7 +67,7 @@ pwr_perfctr_func = { ...@@ -67,7 +67,7 @@ pwr_perfctr_func = {
}; };
const struct nouveau_specdom const struct nouveau_specdom
nva3_perfmon_pwr[] = { nva3_pm_pwr[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{ 0x00, "pwr_gr_idle" }, { 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" }, { 0x04, "pwr_bsp_idle" },
...@@ -80,7 +80,7 @@ nva3_perfmon_pwr[] = { ...@@ -80,7 +80,7 @@ nva3_perfmon_pwr[] = {
}; };
const struct nouveau_specdom const struct nouveau_specdom
nvc0_perfmon_pwr[] = { nvc0_pm_pwr[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{ 0x00, "pwr_gr_idle" }, { 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" }, { 0x04, "pwr_bsp_idle" },
...@@ -94,7 +94,7 @@ nvc0_perfmon_pwr[] = { ...@@ -94,7 +94,7 @@ nvc0_perfmon_pwr[] = {
}; };
const struct nouveau_specdom const struct nouveau_specdom
nve0_perfmon_pwr[] = { nve0_pm_pwr[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{ 0x00, "pwr_gr_idle" }, { 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" }, { 0x04, "pwr_bsp_idle" },
......
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nv40.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
View file @ d5752b9b
...@@ -37,11 +37,11 @@ ...@@ -37,11 +37,11 @@
******************************************************************************/ ******************************************************************************/
static void static void
nv40_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, nv40_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
struct nv40_perfmon_priv *priv = (void *)ppm; struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_perfmon_cntr *cntr = (void *)ctr; struct nv40_pm_cntr *cntr = (void *)ctr;
u32 log = ctr->logic_op; u32 log = ctr->logic_op;
u32 src = 0x00000000; u32 src = 0x00000000;
int i; int i;
...@@ -55,11 +55,11 @@ nv40_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -55,11 +55,11 @@ nv40_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
nv40_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, nv40_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
struct nv40_perfmon_priv *priv = (void *)ppm; struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_perfmon_cntr *cntr = (void *)ctr; struct nv40_pm_cntr *cntr = (void *)ctr;
switch (cntr->base.slot) { switch (cntr->base.slot) {
case 0: cntr->base.ctr = nv_rd32(priv, 0x00a700 + dom->addr); break; case 0: cntr->base.ctr = nv_rd32(priv, 0x00a700 + dom->addr); break;
...@@ -71,9 +71,9 @@ nv40_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -71,9 +71,9 @@ nv40_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
nv40_perfctr_next(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom) nv40_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
{ {
struct nv40_perfmon_priv *priv = (void *)ppm; struct nv40_pm_priv *priv = (void *)ppm;
if (priv->sequence != ppm->sequence) { if (priv->sequence != ppm->sequence) {
nv_wr32(priv, 0x400084, 0x00000020); nv_wr32(priv, 0x400084, 0x00000020);
priv->sequence = ppm->sequence; priv->sequence = ppm->sequence;
...@@ -88,7 +88,7 @@ nv40_perfctr_func = { ...@@ -88,7 +88,7 @@ nv40_perfctr_func = {
}; };
static const struct nouveau_specdom static const struct nouveau_specdom
nv40_perfmon[] = { nv40_pm[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{} {}
}, &nv40_perfctr_func }, }, &nv40_perfctr_func },
...@@ -108,15 +108,15 @@ nv40_perfmon[] = { ...@@ -108,15 +108,15 @@ nv40_perfmon[] = {
}; };
int int
nv40_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv40_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nouveau_object **pobject)
{ {
struct nv40_perfmon_oclass *mclass = (void *)oclass; struct nv40_pm_oclass *mclass = (void *)oclass;
struct nv40_perfmon_priv *priv; struct nv40_pm_priv *priv;
int ret; int ret;
ret = nouveau_perfmon_create(parent, engine, oclass, &priv); ret = nouveau_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
...@@ -125,19 +125,19 @@ nv40_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -125,19 +125,19 @@ nv40_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if (ret) if (ret)
return ret; return ret;
nv_engine(priv)->cclass = &nouveau_perfmon_cclass; nv_engine(priv)->cclass = &nouveau_pm_cclass;
nv_engine(priv)->sclass = nouveau_perfmon_sclass; nv_engine(priv)->sclass = nouveau_pm_sclass;
return 0; return 0;
} }
struct nouveau_oclass * struct nouveau_oclass *
nv40_perfmon_oclass = &(struct nv40_perfmon_oclass) { nv40_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PERFMON, 0x40), .base.handle = NV_ENGINE(PM, 0x40),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv40_perfmon_ctor, .ctor = nv40_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = _nouveau_perfmon_fini, .fini = _nouveau_pm_fini,
}, },
.doms = nv40_perfmon, .doms = nv40_pm,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nv40.h → drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.h
View file @ d5752b9b
...@@ -3,21 +3,21 @@ ...@@ -3,21 +3,21 @@
#include "priv.h" #include "priv.h"
struct nv40_perfmon_oclass { struct nv40_pm_oclass {
struct nouveau_oclass base; struct nouveau_oclass base;
const struct nouveau_specdom *doms; const struct nouveau_specdom *doms;
}; };
struct nv40_perfmon_priv { struct nv40_pm_priv {
struct nouveau_perfmon base; struct nouveau_pm base;
u32 sequence; u32 sequence;
}; };
int nv40_perfmon_ctor(struct nouveau_object *, struct nouveau_object *, int nv40_pm_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *data, u32 size, struct nouveau_oclass *, void *data, u32 size,
struct nouveau_object **pobject); struct nouveau_object **pobject);
struct nv40_perfmon_cntr { struct nv40_pm_cntr {
struct nouveau_perfctr base; struct nouveau_perfctr base;
}; };
......
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nv50.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nv50.c
View file @ d5752b9b
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
******************************************************************************/ ******************************************************************************/
static const struct nouveau_specdom static const struct nouveau_specdom
nv50_perfmon[] = { nv50_pm[] = {
{ 0x040, (const struct nouveau_specsig[]) { { 0x040, (const struct nouveau_specsig[]) {
{} {}
}, &nv40_perfctr_func }, }, &nv40_perfctr_func },
...@@ -58,13 +58,13 @@ nv50_perfmon[] = { ...@@ -58,13 +58,13 @@ nv50_perfmon[] = {
}; };
struct nouveau_oclass * struct nouveau_oclass *
nv50_perfmon_oclass = &(struct nv40_perfmon_oclass) { nv50_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PERFMON, 0x50), .base.handle = NV_ENGINE(PM, 0x50),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv40_perfmon_ctor, .ctor = nv40_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = _nouveau_perfmon_fini, .fini = _nouveau_pm_fini,
}, },
.doms = nv50_perfmon, .doms = nv50_pm,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nv84.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nv84.c
View file @ d5752b9b
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
******************************************************************************/ ******************************************************************************/
static const struct nouveau_specdom static const struct nouveau_specdom
nv84_perfmon[] = { nv84_pm[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{} {}
}, &nv40_perfctr_func }, }, &nv40_perfctr_func },
...@@ -66,13 +66,13 @@ nv84_perfmon[] = { ...@@ -66,13 +66,13 @@ nv84_perfmon[] = {
}; };
struct nouveau_oclass * struct nouveau_oclass *
nv84_perfmon_oclass = &(struct nv40_perfmon_oclass) { nv84_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PERFMON, 0x84), .base.handle = NV_ENGINE(PM, 0x84),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv40_perfmon_ctor, .ctor = nv40_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = _nouveau_perfmon_fini, .fini = _nouveau_pm_fini,
}, },
.doms = nv84_perfmon, .doms = nv84_pm,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nva3.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nva3.c
View file @ d5752b9b
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
******************************************************************************/ ******************************************************************************/
static const struct nouveau_specdom static const struct nouveau_specdom
nva3_perfmon[] = { nva3_pm[] = {
{ 0x20, (const struct nouveau_specsig[]) { { 0x20, (const struct nouveau_specsig[]) {
{} {}
}, &nv40_perfctr_func }, }, &nv40_perfctr_func },
...@@ -66,15 +66,15 @@ nva3_perfmon[] = { ...@@ -66,15 +66,15 @@ nva3_perfmon[] = {
}; };
static int static int
nva3_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nva3_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **object) struct nouveau_object **object)
{ {
int ret = nv40_perfmon_ctor(parent, engine, oclass, data, size, object); int ret = nv40_pm_ctor(parent, engine, oclass, data, size, object);
if (ret == 0) { if (ret == 0) {
struct nv40_perfmon_priv *priv = (void *)*object; struct nv40_pm_priv *priv = (void *)*object;
ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
nva3_perfmon_pwr); nva3_pm_pwr);
if (ret) if (ret)
return ret; return ret;
...@@ -84,13 +84,13 @@ nva3_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -84,13 +84,13 @@ nva3_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
} }
struct nouveau_oclass * struct nouveau_oclass *
nva3_perfmon_oclass = &(struct nv40_perfmon_oclass) { nva3_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PERFMON, 0xa3), .base.handle = NV_ENGINE(PM, 0xa3),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nva3_perfmon_ctor, .ctor = nva3_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = _nouveau_perfmon_fini, .fini = _nouveau_pm_fini,
}, },
.doms = nva3_perfmon, .doms = nva3_pm,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nvc0.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nvc0.c
View file @ d5752b9b
...@@ -37,26 +37,26 @@ ...@@ -37,26 +37,26 @@
******************************************************************************/ ******************************************************************************/
static const struct nouveau_specdom static const struct nouveau_specdom
nvc0_perfmon_hub[] = { nvc0_pm_hub[] = {
{} {}
}; };
static const struct nouveau_specdom static const struct nouveau_specdom
nvc0_perfmon_gpc[] = { nvc0_pm_gpc[] = {
{} {}
}; };
static const struct nouveau_specdom static const struct nouveau_specdom
nvc0_perfmon_part[] = { nvc0_pm_part[] = {
{} {}
}; };
static void static void
nvc0_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, nvc0_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
struct nvc0_perfmon_priv *priv = (void *)ppm; struct nvc0_pm_priv *priv = (void *)ppm;
struct nvc0_perfmon_cntr *cntr = (void *)ctr; struct nvc0_pm_cntr *cntr = (void *)ctr;
u32 log = ctr->logic_op; u32 log = ctr->logic_op;
u32 src = 0x00000000; u32 src = 0x00000000;
int i; int i;
...@@ -71,11 +71,11 @@ nvc0_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -71,11 +71,11 @@ nvc0_perfctr_init(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
nvc0_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, nvc0_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
struct nouveau_perfctr *ctr) struct nouveau_perfctr *ctr)
{ {
struct nvc0_perfmon_priv *priv = (void *)ppm; struct nvc0_pm_priv *priv = (void *)ppm;
struct nvc0_perfmon_cntr *cntr = (void *)ctr; struct nvc0_pm_cntr *cntr = (void *)ctr;
switch (cntr->base.slot) { switch (cntr->base.slot) {
case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break; case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break;
...@@ -87,9 +87,9 @@ nvc0_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom, ...@@ -87,9 +87,9 @@ nvc0_perfctr_read(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom,
} }
static void static void
nvc0_perfctr_next(struct nouveau_perfmon *ppm, struct nouveau_perfdom *dom) nvc0_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
{ {
struct nvc0_perfmon_priv *priv = (void *)ppm; struct nvc0_pm_priv *priv = (void *)ppm;
nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27); nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
nv_wr32(priv, dom->addr + 0x0ec, 0x00000011); nv_wr32(priv, dom->addr + 0x0ec, 0x00000011);
} }
...@@ -102,36 +102,36 @@ nvc0_perfctr_func = { ...@@ -102,36 +102,36 @@ nvc0_perfctr_func = {
}; };
int int
nvc0_perfmon_fini(struct nouveau_object *object, bool suspend) nvc0_pm_fini(struct nouveau_object *object, bool suspend)
{ {
struct nvc0_perfmon_priv *priv = (void *)object; struct nvc0_pm_priv *priv = (void *)object;
nv_mask(priv, 0x000200, 0x10000000, 0x00000000); nv_mask(priv, 0x000200, 0x10000000, 0x00000000);
nv_mask(priv, 0x000200, 0x10000000, 0x10000000); nv_mask(priv, 0x000200, 0x10000000, 0x10000000);
return nouveau_perfmon_fini(&priv->base, suspend); return nouveau_pm_fini(&priv->base, suspend);
} }
static int static int
nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nvc0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nouveau_object **pobject)
{ {
struct nvc0_perfmon_priv *priv; struct nvc0_pm_priv *priv;
u32 mask; u32 mask;
int ret; int ret;
ret = nouveau_perfmon_create(parent, engine, oclass, &priv); ret = nouveau_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
nvc0_perfmon_pwr); nvc0_pm_pwr);
if (ret) if (ret)
return ret; return ret;
/* HUB */ /* HUB */
ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200, ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
nvc0_perfmon_hub); nvc0_pm_hub);
if (ret) if (ret)
return ret; return ret;
...@@ -141,7 +141,7 @@ nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -141,7 +141,7 @@ nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
mask &= ~nv_rd32(priv, 0x022584); mask &= ~nv_rd32(priv, 0x022584);
ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000, ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000,
0x1000, 0x200, nvc0_perfmon_gpc); 0x1000, 0x200, nvc0_pm_gpc);
if (ret) if (ret)
return ret; return ret;
...@@ -151,23 +151,23 @@ nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -151,23 +151,23 @@ nvc0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
mask &= ~nv_rd32(priv, 0x0225c8); mask &= ~nv_rd32(priv, 0x0225c8);
ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000, ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000,
0x1000, 0x200, nvc0_perfmon_part); 0x1000, 0x200, nvc0_pm_part);
if (ret) if (ret)
return ret; return ret;
nv_engine(priv)->cclass = &nouveau_perfmon_cclass; nv_engine(priv)->cclass = &nouveau_pm_cclass;
nv_engine(priv)->sclass = nouveau_perfmon_sclass; nv_engine(priv)->sclass = nouveau_pm_sclass;
priv->base.last = 7; priv->base.last = 7;
return 0; return 0;
} }
struct nouveau_oclass struct nouveau_oclass
nvc0_perfmon_oclass = { nvc0_pm_oclass = {
.handle = NV_ENGINE(PERFMON, 0xc0), .handle = NV_ENGINE(PM, 0xc0),
.ofuncs = &(struct nouveau_ofuncs) { .ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvc0_perfmon_ctor, .ctor = nvc0_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = nvc0_perfmon_fini, .fini = nvc0_pm_fini,
}, },
}; };
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nvc0.h → drivers/gpu/drm/nouveau/nvkm/engine/pm/nvc0.h
View file @ d5752b9b
...@@ -3,15 +3,15 @@ ...@@ -3,15 +3,15 @@
#include "priv.h" #include "priv.h"
struct nvc0_perfmon_priv { struct nvc0_pm_priv {
struct nouveau_perfmon base; struct nouveau_pm base;
}; };
struct nvc0_perfmon_cntr { struct nvc0_pm_cntr {
struct nouveau_perfctr base; struct nouveau_perfctr base;
}; };
extern const struct nouveau_funcdom nvc0_perfctr_func; extern const struct nouveau_funcdom nvc0_perfctr_func;
int nvc0_perfmon_fini(struct nouveau_object *, bool); int nvc0_pm_fini(struct nouveau_object *, bool);
#endif #endif
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nve0.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nve0.c
View file @ d5752b9b
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
******************************************************************************/ ******************************************************************************/
static const struct nouveau_specdom static const struct nouveau_specdom
nve0_perfmon_hub[] = { nve0_pm_hub[] = {
{ 0x60, (const struct nouveau_specsig[]) { { 0x60, (const struct nouveau_specsig[]) {
{ 0x47, "hub00_user_0" }, { 0x47, "hub00_user_0" },
{} {}
...@@ -77,7 +77,7 @@ nve0_perfmon_hub[] = { ...@@ -77,7 +77,7 @@ nve0_perfmon_hub[] = {
}; };
static const struct nouveau_specdom static const struct nouveau_specdom
nve0_perfmon_gpc[] = { nve0_pm_gpc[] = {
{ 0xe0, (const struct nouveau_specsig[]) { { 0xe0, (const struct nouveau_specsig[]) {
{ 0xc7, "gpc00_user_0" }, { 0xc7, "gpc00_user_0" },
{} {}
...@@ -86,7 +86,7 @@ nve0_perfmon_gpc[] = { ...@@ -86,7 +86,7 @@ nve0_perfmon_gpc[] = {
}; };
static const struct nouveau_specdom static const struct nouveau_specdom
nve0_perfmon_part[] = { nve0_pm_part[] = {
{ 0x60, (const struct nouveau_specsig[]) { { 0x60, (const struct nouveau_specsig[]) {
{ 0x47, "part00_user_0" }, { 0x47, "part00_user_0" },
{} {}
...@@ -99,28 +99,28 @@ nve0_perfmon_part[] = { ...@@ -99,28 +99,28 @@ nve0_perfmon_part[] = {
}; };
static int static int
nve0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nve0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nouveau_object **pobject)
{ {
struct nvc0_perfmon_priv *priv; struct nvc0_pm_priv *priv;
u32 mask; u32 mask;
int ret; int ret;
ret = nouveau_perfmon_create(parent, engine, oclass, &priv); ret = nouveau_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
/* PDAEMON */ /* PDAEMON */
ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
nve0_perfmon_pwr); nve0_pm_pwr);
if (ret) if (ret)
return ret; return ret;
/* HUB */ /* HUB */
ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200, ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
nve0_perfmon_hub); nve0_pm_hub);
if (ret) if (ret)
return ret; return ret;
...@@ -130,7 +130,7 @@ nve0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -130,7 +130,7 @@ nve0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
mask &= ~nv_rd32(priv, 0x022584); mask &= ~nv_rd32(priv, 0x022584);
ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000, ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000,
0x1000, 0x200, nve0_perfmon_gpc); 0x1000, 0x200, nve0_pm_gpc);
if (ret) if (ret)
return ret; return ret;
...@@ -140,23 +140,23 @@ nve0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -140,23 +140,23 @@ nve0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
mask &= ~nv_rd32(priv, 0x0225c8); mask &= ~nv_rd32(priv, 0x0225c8);
ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000, ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000,
0x1000, 0x200, nve0_perfmon_part); 0x1000, 0x200, nve0_pm_part);
if (ret) if (ret)
return ret; return ret;
nv_engine(priv)->cclass = &nouveau_perfmon_cclass; nv_engine(priv)->cclass = &nouveau_pm_cclass;
nv_engine(priv)->sclass = nouveau_perfmon_sclass; nv_engine(priv)->sclass = nouveau_pm_sclass;
priv->base.last = 7; priv->base.last = 7;
return 0; return 0;
} }
struct nouveau_oclass struct nouveau_oclass
nve0_perfmon_oclass = { nve0_pm_oclass = {
.handle = NV_ENGINE(PERFMON, 0xe0), .handle = NV_ENGINE(PM, 0xe0),
.ofuncs = &(struct nouveau_ofuncs) { .ofuncs = &(struct nouveau_ofuncs) {
.ctor = nve0_perfmon_ctor, .ctor = nve0_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = nvc0_perfmon_fini, .fini = nvc0_pm_fini,
}, },
}; };
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/nvf0.c → drivers/gpu/drm/nouveau/nvkm/engine/pm/nvf0.c
View file @ d5752b9b
...@@ -37,35 +37,35 @@ ...@@ -37,35 +37,35 @@
******************************************************************************/ ******************************************************************************/
static int static int
nvf0_perfmon_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nvf0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nouveau_object **pobject)
{ {
struct nvc0_perfmon_priv *priv; struct nvc0_pm_priv *priv;
int ret; int ret;
ret = nouveau_perfmon_create(parent, engine, oclass, &priv); ret = nouveau_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
nve0_perfmon_pwr); nve0_pm_pwr);
if (ret) if (ret)
return ret; return ret;
nv_engine(priv)->cclass = &nouveau_perfmon_cclass; nv_engine(priv)->cclass = &nouveau_pm_cclass;
nv_engine(priv)->sclass = nouveau_perfmon_sclass; nv_engine(priv)->sclass = nouveau_pm_sclass;
return 0; return 0;
} }
struct nouveau_oclass struct nouveau_oclass
nvf0_perfmon_oclass = { nvf0_pm_oclass = {
.handle = NV_ENGINE(PERFMON, 0xf0), .handle = NV_ENGINE(PM, 0xf0),
.ofuncs = &(struct nouveau_ofuncs) { .ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvf0_perfmon_ctor, .ctor = nvf0_pm_ctor,
.dtor = _nouveau_perfmon_dtor, .dtor = _nouveau_pm_dtor,
.init = _nouveau_perfmon_init, .init = _nouveau_pm_init,
.fini = nvc0_perfmon_fini, .fini = nvc0_pm_fini,
}, },
}; };
drivers/gpu/drm/nouveau/nvkm/engine/perfmon/priv.h → drivers/gpu/drm/nouveau/nvkm/engine/pm/priv.h
View file @ d5752b9b
#ifndef __NVKM_PERFMON_PRIV_H__ #ifndef __NVKM_PM_PRIV_H__
#define __NVKM_PERFMON_PRIV_H__ #define __NVKM_PM_PRIV_H__
#include <engine/perfmon.h> #include <engine/pm.h>
struct nouveau_perfctr { struct nouveau_perfctr {
struct nouveau_object base; struct nouveau_object base;
...@@ -13,13 +13,13 @@ struct nouveau_perfctr { ...@@ -13,13 +13,13 @@ struct nouveau_perfctr {
u32 ctr; u32 ctr;
}; };
extern struct nouveau_oclass nouveau_perfmon_sclass[]; extern struct nouveau_oclass nouveau_pm_sclass[];
struct nouveau_perfctx { struct nouveau_perfctx {
struct nouveau_engctx base; struct nouveau_engctx base;
}; };
extern struct nouveau_oclass nouveau_perfmon_cclass; extern struct nouveau_oclass nouveau_pm_cclass;
struct nouveau_specsig { struct nouveau_specsig {
u8 signal; u8 signal;
...@@ -32,7 +32,7 @@ struct nouveau_perfsig { ...@@ -32,7 +32,7 @@ struct nouveau_perfsig {
struct nouveau_perfdom; struct nouveau_perfdom;
struct nouveau_perfctr * struct nouveau_perfctr *
nouveau_perfsig_wrap(struct nouveau_perfmon *, const char *, nouveau_perfsig_wrap(struct nouveau_pm *, const char *,
struct nouveau_perfdom **); struct nouveau_perfdom **);
struct nouveau_specdom { struct nouveau_specdom {
...@@ -41,9 +41,9 @@ struct nouveau_specdom { ...@@ -41,9 +41,9 @@ struct nouveau_specdom {
const struct nouveau_funcdom *func; const struct nouveau_funcdom *func;
}; };
extern const struct nouveau_specdom nva3_perfmon_pwr[]; extern const struct nouveau_specdom nva3_pm_pwr[];
extern const struct nouveau_specdom nvc0_perfmon_pwr[]; extern const struct nouveau_specdom nvc0_pm_pwr[];
extern const struct nouveau_specdom nve0_perfmon_pwr[]; extern const struct nouveau_specdom nve0_pm_pwr[];
struct nouveau_perfdom { struct nouveau_perfdom {
struct list_head head; struct list_head head;
...@@ -57,35 +57,35 @@ struct nouveau_perfdom { ...@@ -57,35 +57,35 @@ struct nouveau_perfdom {
}; };
struct nouveau_funcdom { struct nouveau_funcdom {
void (*init)(struct nouveau_perfmon *, struct nouveau_perfdom *, void (*init)(struct nouveau_pm *, struct nouveau_perfdom *,
struct nouveau_perfctr *); struct nouveau_perfctr *);
void (*read)(struct nouveau_perfmon *, struct nouveau_perfdom *, void (*read)(struct nouveau_pm *, struct nouveau_perfdom *,
struct nouveau_perfctr *); struct nouveau_perfctr *);
void (*next)(struct nouveau_perfmon *, struct nouveau_perfdom *); void (*next)(struct nouveau_pm *, struct nouveau_perfdom *);
}; };
int nouveau_perfdom_new(struct nouveau_perfmon *, const char *, u32, int nouveau_perfdom_new(struct nouveau_pm *, const char *, u32,
u32, u32, u32, const struct nouveau_specdom *); u32, u32, u32, const struct nouveau_specdom *);
#define nouveau_perfmon_create(p,e,o,d) \ #define nouveau_pm_create(p,e,o,d) \
nouveau_perfmon_create_((p), (e), (o), sizeof(**d), (void **)d) nouveau_pm_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_perfmon_dtor(p) ({ \ #define nouveau_pm_dtor(p) ({ \
struct nouveau_perfmon *c = (p); \ struct nouveau_pm *c = (p); \
_nouveau_perfmon_dtor(nv_object(c)); \ _nouveau_pm_dtor(nv_object(c)); \
}) })
#define nouveau_perfmon_init(p) ({ \ #define nouveau_pm_init(p) ({ \
struct nouveau_perfmon *c = (p); \ struct nouveau_pm *c = (p); \
_nouveau_perfmon_init(nv_object(c)); \ _nouveau_pm_init(nv_object(c)); \
}) })
#define nouveau_perfmon_fini(p,s) ({ \ #define nouveau_pm_fini(p,s) ({ \
struct nouveau_perfmon *c = (p); \ struct nouveau_pm *c = (p); \
_nouveau_perfmon_fini(nv_object(c), (s)); \ _nouveau_pm_fini(nv_object(c), (s)); \
}) })
int nouveau_perfmon_create_(struct nouveau_object *, struct nouveau_object *, int nouveau_pm_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **); struct nouveau_oclass *, int, void **);
void _nouveau_perfmon_dtor(struct nouveau_object *); void _nouveau_pm_dtor(struct nouveau_object *);
int _nouveau_perfmon_init(struct nouveau_object *); int _nouveau_pm_init(struct nouveau_object *);
int _nouveau_perfmon_fini(struct nouveau_object *, bool); int _nouveau_pm_fini(struct nouveau_object *, bool);
#endif #endif
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