Commit d64a0472 authored by Dave Airlie's avatar Dave Airlie

Merge branch 'drm-fixes-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

A few small fixes for 4.11

* 'drm-fixes-4.11' of git://people.freedesktop.org/~agd5f/linux:
  drm/amd/amdgpu: add POLARIS12 PCI ID
  drm/amdgpu: fix the clearing wb size
  drm/amdgpu: reinstate oland workaround for sclk
  drm/radeon: reinstate oland workaround for sclk
parents f505a5c0 cf8c73af
...@@ -475,7 +475,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev) ...@@ -475,7 +475,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
int r; int r;
if (adev->wb.wb_obj == NULL) { if (adev->wb.wb_obj == NULL) {
r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * 4, r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT, PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
&adev->wb.wb_obj, &adev->wb.gpu_addr, &adev->wb.wb_obj, &adev->wb.gpu_addr,
(void **)&adev->wb.wb); (void **)&adev->wb.wb);
...@@ -488,7 +488,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev) ...@@ -488,7 +488,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
memset(&adev->wb.used, 0, sizeof(adev->wb.used)); memset(&adev->wb.used, 0, sizeof(adev->wb.used));
/* clear wb memory */ /* clear wb memory */
memset((char *)adev->wb.wb, 0, AMDGPU_GPU_PAGE_SIZE); memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t));
} }
return 0; return 0;
......
...@@ -421,6 +421,7 @@ static const struct pci_device_id pciidlist[] = { ...@@ -421,6 +421,7 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, {0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
{0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, {0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
{0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, {0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
{0x1002, 0x6995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
{0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, {0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
{0, 0, 0} {0, 0, 0}
......
...@@ -3465,9 +3465,13 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, ...@@ -3465,9 +3465,13 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
max_sclk = 75000; max_sclk = 75000;
} }
} else if (adev->asic_type == CHIP_OLAND) { } else if (adev->asic_type == CHIP_OLAND) {
if ((adev->pdev->device == 0x6604) && if ((adev->pdev->revision == 0xC7) ||
(adev->pdev->subsystem_vendor == 0x1028) && (adev->pdev->revision == 0x80) ||
(adev->pdev->subsystem_device == 0x066F)) { (adev->pdev->revision == 0x81) ||
(adev->pdev->revision == 0x83) ||
(adev->pdev->revision == 0x87) ||
(adev->pdev->device == 0x6604) ||
(adev->pdev->device == 0x6605)) {
max_sclk = 75000; max_sclk = 75000;
} }
} }
......
...@@ -2985,9 +2985,13 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, ...@@ -2985,9 +2985,13 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
max_sclk = 75000; max_sclk = 75000;
} }
} else if (rdev->family == CHIP_OLAND) { } else if (rdev->family == CHIP_OLAND) {
if ((rdev->pdev->device == 0x6604) && if ((rdev->pdev->revision == 0xC7) ||
(rdev->pdev->subsystem_vendor == 0x1028) && (rdev->pdev->revision == 0x80) ||
(rdev->pdev->subsystem_device == 0x066F)) { (rdev->pdev->revision == 0x81) ||
(rdev->pdev->revision == 0x83) ||
(rdev->pdev->revision == 0x87) ||
(rdev->pdev->device == 0x6604) ||
(rdev->pdev->device == 0x6605)) {
max_sclk = 75000; max_sclk = 75000;
} }
} }
......
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