Commit d7f405c0 authored by Dave Jones's avatar Dave Jones Committed by Linus Torvalds

[PATCH] fix up newer x86 cpuinfo flags.

According to Intel document 24161823.pdf[*] page 18, 'tm2' is misdefined.
Its bit 7 not, bit 8. Also add the missing 'EST' (Enhanced Speedstep Technology)
bit, and use the correct Intel terminology for the context ID bit.

[*] http://www.intel.com/design/xeon/applnots/241618.htm
parent 5e236e7e
...@@ -44,8 +44,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) ...@@ -44,8 +44,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* Intel-defined (#2) */ /* Intel-defined (#2) */
"pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, NULL, "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
"tm2", NULL, "cnxt_id", NULL, NULL, NULL, NULL, NULL, "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
......
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