Commit d84248bf authored by Rini van Zetten's avatar Rini van Zetten Committed by Linus Torvalds

atmel_spi: reload RCR before TCR

We have a wifi module connected to the spi bus and got sometimes FIFO
overrun errors on the spi bus.

After some investigation i found that the driver loads the TCR (transmit
count) register before the RCR (receive count).  When the transfer list is
not empty the atmel_spi_next_message is called while tx and rx are enabled.
 As soon as the TCR is loaded, hardware starts transfer and causes a rx
fifo overrun because the RCR is not loaded yet.

Load the RCR before the TCR.  After this patch the fifo overrun disapears
at out setup.
Signed-off-by: default avatarHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: default avatarRini van Zetten <rini@arvoo.nl>
Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 6650e0a5
...@@ -195,8 +195,8 @@ static void atmel_spi_next_xfer(struct spi_master *master, ...@@ -195,8 +195,8 @@ static void atmel_spi_next_xfer(struct spi_master *master,
xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR)); xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
spi_writel(as, TCR, len);
spi_writel(as, RCR, len); spi_writel(as, RCR, len);
spi_writel(as, TCR, len);
spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
} }
......
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