Commit d95ec7e2 authored by Fernando Guzman Lugo's avatar Fernando Guzman Lugo Committed by Greg Kroah-Hartman

staging: tidspbridge: replace iommu custom for opensource implementation

Now the tidspbridge uses the API's from
iovmm module.
Signed-off-by: default avatarFernando Guzman Lugo <x0095840@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 0ee5ab30
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#include <plat/clockdomain.h> #include <plat/clockdomain.h>
#include <mach-omap2/prm-regbits-34xx.h> #include <mach-omap2/prm-regbits-34xx.h>
#include <mach-omap2/cm-regbits-34xx.h> #include <mach-omap2/cm-regbits-34xx.h>
#include <plat/iommu.h>
#include <plat/iovmm.h>
#include <dspbridge/devdefs.h> #include <dspbridge/devdefs.h>
#include <hw_defs.h> #include <hw_defs.h>
#include <dspbridge/dspioctl.h> /* for bridge_ioctl_extproc defn */ #include <dspbridge/dspioctl.h> /* for bridge_ioctl_extproc defn */
...@@ -328,7 +330,7 @@ struct bridge_dev_context { ...@@ -328,7 +330,7 @@ struct bridge_dev_context {
u32 dw_internal_size; /* Internal memory size */ u32 dw_internal_size; /* Internal memory size */
struct omap_mbox *mbox; /* Mail box handle */ struct omap_mbox *mbox; /* Mail box handle */
struct iommu *dsp_mmu; /* iommu for iva2 handler */
struct cfg_hostres *resources; /* Host Resources */ struct cfg_hostres *resources; /* Host Resources */
/* /*
......
...@@ -291,6 +291,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -291,6 +291,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
struct cod_manager *cod_man; struct cod_manager *cod_man;
struct chnl_mgr *hchnl_mgr; struct chnl_mgr *hchnl_mgr;
struct msg_mgr *hmsg_mgr; struct msg_mgr *hmsg_mgr;
struct iommu *mmu;
u32 ul_shm_base; u32 ul_shm_base;
u32 ul_shm_base_offset; u32 ul_shm_base_offset;
u32 ul_shm_limit; u32 ul_shm_limit;
...@@ -313,7 +314,6 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -313,7 +314,6 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
struct bridge_ioctl_extproc ae_proc[BRDIOCTL_NUMOFMMUTLB]; struct bridge_ioctl_extproc ae_proc[BRDIOCTL_NUMOFMMUTLB];
struct cfg_hostres *host_res; struct cfg_hostres *host_res;
struct bridge_dev_context *pbridge_context; struct bridge_dev_context *pbridge_context;
u32 map_attrs;
u32 shm0_end; u32 shm0_end;
u32 ul_dyn_ext_base; u32 ul_dyn_ext_base;
u32 ul_seg1_size = 0; u32 ul_seg1_size = 0;
...@@ -337,6 +337,20 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -337,6 +337,20 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
status = -EFAULT; status = -EFAULT;
goto func_end; goto func_end;
} }
mmu = pbridge_context->dsp_mmu;
if (mmu)
iommu_put(mmu);
mmu = iommu_get("iva2");
if (IS_ERR_OR_NULL(mmu)) {
dev_err(bridge, "iommu_get failed!\n");
pbridge_context->dsp_mmu = NULL;
status = -EFAULT;
goto func_end;
}
pbridge_context->dsp_mmu = mmu;
status = dev_get_cod_mgr(hio_mgr->hdev_obj, &cod_man); status = dev_get_cod_mgr(hio_mgr->hdev_obj, &cod_man);
if (!cod_man) { if (!cod_man) {
status = -EFAULT; status = -EFAULT;
...@@ -476,55 +490,16 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -476,55 +490,16 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
gpp_va_curr = ul_gpp_va; gpp_va_curr = ul_gpp_va;
num_bytes = ul_seg1_size; num_bytes = ul_seg1_size;
/* va_curr = iommu_kmap(mmu, va_curr, pa_curr, num_bytes,
* Try to fit into TLB entries. If not possible, push them to page IOVMF_ENDIAN_LITTLE | IOVMF_ELSZ_32);
* tables. It is quite possible that if sections are not on if (IS_ERR_VALUE(va_curr)) {
* bigger page boundary, we may end up making several small pages. status = (int)va_curr;
* So, push them onto page tables, if that is the case. goto func_end;
*/
map_attrs = 0x00000000;
map_attrs = DSP_MAPLITTLEENDIAN;
map_attrs |= DSP_MAPPHYSICALADDR;
map_attrs |= DSP_MAPELEMSIZE32;
map_attrs |= DSP_MAPDONOTLOCK;
while (num_bytes) {
/*
* To find the max. page size with which both PA & VA are
* aligned.
*/
all_bits = pa_curr | va_curr;
dev_dbg(bridge, "all_bits %x, pa_curr %x, va_curr %x, "
"num_bytes %x\n", all_bits, pa_curr, va_curr,
num_bytes);
for (i = 0; i < 4; i++) {
if ((num_bytes >= page_size[i]) && ((all_bits &
(page_size[i] -
1)) == 0)) {
status =
hio_mgr->intf_fxns->
pfn_brd_mem_map(hio_mgr->hbridge_context,
pa_curr, va_curr,
page_size[i], map_attrs,
NULL);
if (status)
goto func_end;
pa_curr += page_size[i];
va_curr += page_size[i];
gpp_va_curr += page_size[i];
num_bytes -= page_size[i];
/*
* Don't try smaller sizes. Hopefully we have
* reached an address aligned to a bigger page
* size.
*/
break;
}
}
} }
pa_curr += ul_pad_size;
va_curr += ul_pad_size; pa_curr += ul_pad_size + num_bytes;
gpp_va_curr += ul_pad_size; va_curr += ul_pad_size + num_bytes;
gpp_va_curr += ul_pad_size + num_bytes;
/* Configure the TLB entries for the next cacheable segment */ /* Configure the TLB entries for the next cacheable segment */
num_bytes = ul_seg_size; num_bytes = ul_seg_size;
...@@ -566,22 +541,6 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -566,22 +541,6 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
ae_proc[ndx].ul_dsp_va * ae_proc[ndx].ul_dsp_va *
hio_mgr->word_size, page_size[i]); hio_mgr->word_size, page_size[i]);
ndx++; ndx++;
} else {
status =
hio_mgr->intf_fxns->
pfn_brd_mem_map(hio_mgr->hbridge_context,
pa_curr, va_curr,
page_size[i], map_attrs,
NULL);
dev_dbg(bridge,
"shm MMU PTE entry PA %x"
" VA %x DSP_VA %x Size %x\n",
ae_proc[ndx].ul_gpp_pa,
ae_proc[ndx].ul_gpp_va,
ae_proc[ndx].ul_dsp_va *
hio_mgr->word_size, page_size[i]);
if (status)
goto func_end;
} }
pa_curr += page_size[i]; pa_curr += page_size[i];
va_curr += page_size[i]; va_curr += page_size[i];
...@@ -634,37 +593,29 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) ...@@ -634,37 +593,29 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr)
"DSP_VA 0x%x\n", ae_proc[ndx].ul_gpp_pa, "DSP_VA 0x%x\n", ae_proc[ndx].ul_gpp_pa,
ae_proc[ndx].ul_dsp_va); ae_proc[ndx].ul_dsp_va);
ndx++; ndx++;
} else {
status = hio_mgr->intf_fxns->pfn_brd_mem_map
(hio_mgr->hbridge_context,
hio_mgr->ext_proc_info.ty_tlb[i].
ul_gpp_phys,
hio_mgr->ext_proc_info.ty_tlb[i].
ul_dsp_virt, 0x100000, map_attrs,
NULL);
} }
} }
if (status) if (status)
goto func_end; goto func_end;
} }
map_attrs = 0x00000000;
map_attrs = DSP_MAPLITTLEENDIAN;
map_attrs |= DSP_MAPPHYSICALADDR;
map_attrs |= DSP_MAPELEMSIZE32;
map_attrs |= DSP_MAPDONOTLOCK;
/* Map the L4 peripherals */ /* Map the L4 peripherals */
i = 0; i = 0;
while (l4_peripheral_table[i].phys_addr) { while (l4_peripheral_table[i].phys_addr) {
status = hio_mgr->intf_fxns->pfn_brd_mem_map status = iommu_kmap(mmu, l4_peripheral_table[i].
(hio_mgr->hbridge_context, l4_peripheral_table[i].phys_addr, dsp_virt_addr, l4_peripheral_table[i].phys_addr,
l4_peripheral_table[i].dsp_virt_addr, HW_PAGE_SIZE4KB, PAGE_SIZE, IOVMF_ENDIAN_LITTLE | IOVMF_ELSZ_32);
map_attrs, NULL); if (IS_ERR_VALUE(status))
if (status) break;
goto func_end;
i++; i++;
} }
if (IS_ERR_VALUE(status)) {
while (i--)
iommu_kunmap(mmu, l4_peripheral_table[i].
dsp_virt_addr);
goto func_end;
}
status = 0;
for (i = ndx; i < BRDIOCTL_NUMOFMMUTLB; i++) { for (i = ndx; i < BRDIOCTL_NUMOFMMUTLB; i++) {
ae_proc[i].ul_dsp_va = 0; ae_proc[i].ul_dsp_va = 0;
......
...@@ -115,12 +115,6 @@ int bridge_deh_create(struct deh_mgr **ret_deh, ...@@ -115,12 +115,6 @@ int bridge_deh_create(struct deh_mgr **ret_deh,
/* Fill in context structure */ /* Fill in context structure */
deh->hbridge_context = hbridge_context; deh->hbridge_context = hbridge_context;
/* Install ISR function for DSP MMU fault */
status = request_irq(INT_DSP_MMU_IRQ, mmu_fault_isr, 0,
"DspBridge\tiommu fault", deh);
if (status < 0)
goto err;
*ret_deh = deh; *ret_deh = deh;
return 0; return 0;
...@@ -140,8 +134,6 @@ int bridge_deh_destroy(struct deh_mgr *deh) ...@@ -140,8 +134,6 @@ int bridge_deh_destroy(struct deh_mgr *deh)
ntfy_delete(deh->ntfy_obj); ntfy_delete(deh->ntfy_obj);
kfree(deh->ntfy_obj); kfree(deh->ntfy_obj);
} }
/* Disable DSP MMU fault */
free_irq(INT_DSP_MMU_IRQ, deh);
/* Free DPC object */ /* Free DPC object */
tasklet_kill(&deh->dpc_tasklet); tasklet_kill(&deh->dpc_tasklet);
......
...@@ -201,7 +201,7 @@ typedef int(*fxn_brd_memmap) (struct bridge_dev_context ...@@ -201,7 +201,7 @@ typedef int(*fxn_brd_memmap) (struct bridge_dev_context
*/ */
typedef int(*fxn_brd_memunmap) (struct bridge_dev_context typedef int(*fxn_brd_memunmap) (struct bridge_dev_context
* dev_ctxt, * dev_ctxt,
u32 virt_addr, u32 ul_num_bytes); u32 da);
/* /*
* ======== bridge_brd_stop ======== * ======== bridge_brd_stop ========
......
...@@ -1723,7 +1723,7 @@ int proc_un_map(void *hprocessor, void *map_addr, ...@@ -1723,7 +1723,7 @@ int proc_un_map(void *hprocessor, void *map_addr,
/* Remove mapping from the page tables. */ /* Remove mapping from the page tables. */
if (!status) { if (!status) {
status = (*p_proc_object->intf_fxns->pfn_brd_mem_un_map) status = (*p_proc_object->intf_fxns->pfn_brd_mem_un_map)
(p_proc_object->hbridge_context, va_align, size_align); (p_proc_object->hbridge_context, va_align);
} }
mutex_unlock(&proc_lock); mutex_unlock(&proc_lock);
......
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