Commit da457d4b authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (27 commits)
  [POWERPC] 83xx: Update mpc8349emitx(gp) defconfig for USB
  [POWERPC] 83xx: Update mpc832x_rdb_defconfig to enable MMC-over-SPI
  [POWERPC] 83xx: MPC832x RDB - remove spidev stub, use mmc_spi
  [POWERPC] 8xxx: MDS board RTC fixes
  [POWERPC] Fix 8xx build breakage due to _tlbie changes
  [POWERPC] Fix device tree interrupt map for Freescale ULI1575 boards
  [POWERPC] Fix possible division by zero in scaled time accounting
  [POWERPC] spufs: Fix context destroy vs /spu readdir race
  [POWERPC] Fix RTAS os-term usage on kernel panic
  [POWERPC] 83xx: Handle mpc8360 rev. 2.1 RGMII timing erratum
  [POWERPC] Document rgmii-rxid and rgmii-txid phy-connection-types
  [POWERPC] 83xx: Fix 2nd UCC entry in mpc832x_mds.dts
  [POWERPC] 83xx: mpc832x mds: Fix board PHY reset code
  [POWERPC] Fix potential NULL dereference
  [POWERPC] vdso: Fixes for cache block sizes
  [POWERPC] pasemi: Don't reset mpic at boot
  [POWERPC] Fix kmalloc alignment on non-coherent DMA platforms
  [POWERPC] Fix build failure on legacy iSeries
  [POWERPC] 4xx: Use virtual PVR value to init FPU on arch/ppc 440EP
  [POWERPC] 4xx: UIC add mask_ack callback
  ...
parents 0f13864e ad639b9f
...@@ -1645,8 +1645,9 @@ platforms are moved over to use the flattened-device-tree model. ...@@ -1645,8 +1645,9 @@ platforms are moved over to use the flattened-device-tree model.
MAC addresses passed by the firmware when no information other MAC addresses passed by the firmware when no information other
than indices is available to associate an address with a device. than indices is available to associate an address with a device.
- phy-connection-type : a string naming the controller/PHY interface type, - phy-connection-type : a string naming the controller/PHY interface type,
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "tbi", i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
or "rtbi". Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
"tbi", or "rtbi".
Example: Example:
ucc@2000 { ucc@2000 {
......
...@@ -57,12 +57,19 @@ wdt@200 { ...@@ -57,12 +57,19 @@ wdt@200 {
}; };
i2c@3000 { i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c"; device_type = "i2c";
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <3000 100>; reg = <3000 100>;
interrupts = <e 8>; interrupts = <e 8>;
interrupt-parent = < &ipic >; interrupt-parent = < &ipic >;
dfsrr; dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
reg = <68>;
};
}; };
serial@4500 { serial@4500 {
...@@ -104,7 +111,7 @@ ipic: pic@700 { ...@@ -104,7 +111,7 @@ ipic: pic@700 {
reg = <700 100>; reg = <700 100>;
device_type = "ipic"; device_type = "ipic";
}; };
par_io@1400 { par_io@1400 {
reg = <1400 100>; reg = <1400 100>;
device_type = "par_io"; device_type = "par_io";
...@@ -117,7 +124,6 @@ pio3: ucc_pin@03 { ...@@ -117,7 +124,6 @@ pio3: ucc_pin@03 {
3 5 1 0 2 0 /* MDC */ 3 5 1 0 2 0 /* MDC */
0 d 2 0 1 0 /* RX_CLK (CLK9) */ 0 d 2 0 1 0 /* RX_CLK (CLK9) */
3 18 2 0 1 0 /* TX_CLK (CLK10) */ 3 18 2 0 1 0 /* TX_CLK (CLK10) */
1 1 1 0 1 0 /* TxD1 */
1 0 1 0 1 0 /* TxD0 */ 1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */ 1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */ 1 2 1 0 1 0 /* TxD2 */
...@@ -165,11 +171,11 @@ qe@e0100000 { ...@@ -165,11 +171,11 @@ qe@e0100000 {
reg = <e0100000 480>; reg = <e0100000 480>;
brg-frequency = <0>; brg-frequency = <0>;
bus-frequency = <BCD3D80>; bus-frequency = <BCD3D80>;
muram@10000 { muram@10000 {
device_type = "muram"; device_type = "muram";
ranges = <0 00010000 00004000>; ranges = <0 00010000 00004000>;
data-only@0 { data-only@0 {
reg = <0 4000>; reg = <0 4000>;
}; };
...@@ -228,7 +234,7 @@ ucc@3200 { ...@@ -228,7 +234,7 @@ ucc@3200 {
compatible = "ucc_geth"; compatible = "ucc_geth";
model = "UCC"; model = "UCC";
device-id = <4>; device-id = <4>;
reg = <3000 200>; reg = <3200 200>;
interrupts = <23>; interrupts = <23>;
interrupt-parent = < &qeic >; interrupt-parent = < &qeic >;
/* /*
......
...@@ -57,15 +57,24 @@ wdt@200 { ...@@ -57,15 +57,24 @@ wdt@200 {
}; };
i2c@3000 { i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c"; device_type = "i2c";
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <3000 100>; reg = <3000 100>;
interrupts = <e 8>; interrupts = <e 8>;
interrupt-parent = < &ipic >; interrupt-parent = < &ipic >;
dfsrr; dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
reg = <68>;
};
}; };
i2c@3100 { i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c"; device_type = "i2c";
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <3100 100>; reg = <3100 100>;
......
...@@ -62,15 +62,24 @@ wdt@200 { ...@@ -62,15 +62,24 @@ wdt@200 {
}; };
i2c@3000 { i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c"; device_type = "i2c";
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <3000 100>; reg = <3000 100>;
interrupts = <e 8>; interrupts = <e 8>;
interrupt-parent = < &ipic >; interrupt-parent = < &ipic >;
dfsrr; dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
reg = <68>;
};
}; };
i2c@3100 { i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c"; device_type = "i2c";
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <3100 100>; reg = <3100 100>;
......
...@@ -272,24 +272,24 @@ pcie@e000b000 { ...@@ -272,24 +272,24 @@ pcie@e000b000 {
clock-frequency = <1fca055>; clock-frequency = <1fca055>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <1b 2>; interrupts = <1b 2>;
interrupt-map-mask = <fb00 0 0 0>; interrupt-map-mask = <ff00 0 0 1>;
interrupt-map = < interrupt-map = <
// IDSEL 0x1c USB // IDSEL 0x1c USB
e000 0 0 0 &i8259 c 2 e000 0 0 1 &i8259 c 2
e100 0 0 0 &i8259 9 2 e100 0 0 1 &i8259 9 2
e200 0 0 0 &i8259 a 2 e200 0 0 1 &i8259 a 2
e300 0 0 0 &i8259 b 2 e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio // IDSEL 0x1d Audio
e800 0 0 0 &i8259 6 2 e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy // IDSEL 0x1e Legacy
f000 0 0 0 &i8259 7 2 f000 0 0 1 &i8259 7 2
f100 0 0 0 &i8259 7 2 f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA // IDSEL 0x1f IDE/SATA
f800 0 0 0 &i8259 e 2 f800 0 0 1 &i8259 e 2
f900 0 0 0 &i8259 5 2 f900 0 0 1 &i8259 5 2
>; >;
pcie@0 { pcie@0 {
......
...@@ -219,36 +219,120 @@ pcie@ffe08000 { ...@@ -219,36 +219,120 @@ pcie@ffe08000 {
clock-frequency = <1fca055>; clock-frequency = <1fca055>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <18 2>; interrupts = <18 2>;
interrupt-map-mask = <fb00 0 0 0>; interrupt-map-mask = <ff00 0 0 7>;
interrupt-map = < interrupt-map = <
/* IDSEL 0x11 - PCI slot 1 */ /* IDSEL 0x11 func 0 - PCI slot 1 */
8800 0 0 1 &mpic 2 1 8800 0 0 1 &mpic 2 1
8800 0 0 2 &mpic 3 1 8800 0 0 2 &mpic 3 1
8800 0 0 3 &mpic 4 1 8800 0 0 3 &mpic 4 1
8800 0 0 4 &mpic 1 1 8800 0 0 4 &mpic 1 1
/* IDSEL 0x12 - PCI slot 2 */ /* IDSEL 0x11 func 1 - PCI slot 1 */
8900 0 0 1 &mpic 2 1
8900 0 0 2 &mpic 3 1
8900 0 0 3 &mpic 4 1
8900 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 2 - PCI slot 1 */
8a00 0 0 1 &mpic 2 1
8a00 0 0 2 &mpic 3 1
8a00 0 0 3 &mpic 4 1
8a00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 3 - PCI slot 1 */
8b00 0 0 1 &mpic 2 1
8b00 0 0 2 &mpic 3 1
8b00 0 0 3 &mpic 4 1
8b00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 4 - PCI slot 1 */
8c00 0 0 1 &mpic 2 1
8c00 0 0 2 &mpic 3 1
8c00 0 0 3 &mpic 4 1
8c00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 5 - PCI slot 1 */
8d00 0 0 1 &mpic 2 1
8d00 0 0 2 &mpic 3 1
8d00 0 0 3 &mpic 4 1
8d00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 6 - PCI slot 1 */
8e00 0 0 1 &mpic 2 1
8e00 0 0 2 &mpic 3 1
8e00 0 0 3 &mpic 4 1
8e00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 7 - PCI slot 1 */
8f00 0 0 1 &mpic 2 1
8f00 0 0 2 &mpic 3 1
8f00 0 0 3 &mpic 4 1
8f00 0 0 4 &mpic 1 1
/* IDSEL 0x12 func 0 - PCI slot 2 */
9000 0 0 1 &mpic 3 1 9000 0 0 1 &mpic 3 1
9000 0 0 2 &mpic 4 1 9000 0 0 2 &mpic 4 1
9000 0 0 3 &mpic 1 1 9000 0 0 3 &mpic 1 1
9000 0 0 4 &mpic 2 1 9000 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 1 - PCI slot 2 */
9100 0 0 1 &mpic 3 1
9100 0 0 2 &mpic 4 1
9100 0 0 3 &mpic 1 1
9100 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 2 - PCI slot 2 */
9200 0 0 1 &mpic 3 1
9200 0 0 2 &mpic 4 1
9200 0 0 3 &mpic 1 1
9200 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 3 - PCI slot 2 */
9300 0 0 1 &mpic 3 1
9300 0 0 2 &mpic 4 1
9300 0 0 3 &mpic 1 1
9300 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 4 - PCI slot 2 */
9400 0 0 1 &mpic 3 1
9400 0 0 2 &mpic 4 1
9400 0 0 3 &mpic 1 1
9400 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 5 - PCI slot 2 */
9500 0 0 1 &mpic 3 1
9500 0 0 2 &mpic 4 1
9500 0 0 3 &mpic 1 1
9500 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 6 - PCI slot 2 */
9600 0 0 1 &mpic 3 1
9600 0 0 2 &mpic 4 1
9600 0 0 3 &mpic 1 1
9600 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 7 - PCI slot 2 */
9700 0 0 1 &mpic 3 1
9700 0 0 2 &mpic 4 1
9700 0 0 3 &mpic 1 1
9700 0 0 4 &mpic 2 1
// IDSEL 0x1c USB // IDSEL 0x1c USB
e000 0 0 0 &i8259 c 2 e000 0 0 1 &i8259 c 2
e100 0 0 0 &i8259 9 2 e100 0 0 1 &i8259 9 2
e200 0 0 0 &i8259 a 2 e200 0 0 1 &i8259 a 2
e300 0 0 0 &i8259 b 2 e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio // IDSEL 0x1d Audio
e800 0 0 0 &i8259 6 2 e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy // IDSEL 0x1e Legacy
f000 0 0 0 &i8259 7 2 f000 0 0 1 &i8259 7 2
f100 0 0 0 &i8259 7 2 f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA // IDSEL 0x1f IDE/SATA
f800 0 0 0 &i8259 e 2 f800 0 0 1 &i8259 e 2
f900 0 0 0 &i8259 5 2 f900 0 0 1 &i8259 5 2
>; >;
......
...@@ -235,36 +235,120 @@ pcie@f8008000 { ...@@ -235,36 +235,120 @@ pcie@f8008000 {
clock-frequency = <1fca055>; clock-frequency = <1fca055>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <18 2>; interrupts = <18 2>;
interrupt-map-mask = <fb00 0 0 0>; interrupt-map-mask = <ff00 0 0 7>;
interrupt-map = < interrupt-map = <
/* IDSEL 0x11 */ /* IDSEL 0x11 func 0 - PCI slot 1 */
8800 0 0 1 &i8259 9 2 8800 0 0 1 &mpic 2 1
8800 0 0 2 &i8259 a 2 8800 0 0 2 &mpic 3 1
8800 0 0 3 &i8259 b 2 8800 0 0 3 &mpic 4 1
8800 0 0 4 &i8259 c 2 8800 0 0 4 &mpic 1 1
/* IDSEL 0x12 */ /* IDSEL 0x11 func 1 - PCI slot 1 */
9000 0 0 1 &i8259 a 2 8900 0 0 1 &mpic 2 1
9000 0 0 2 &i8259 b 2 8900 0 0 2 &mpic 3 1
9000 0 0 3 &i8259 c 2 8900 0 0 3 &mpic 4 1
9000 0 0 4 &i8259 9 2 8900 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 2 - PCI slot 1 */
8a00 0 0 1 &mpic 2 1
8a00 0 0 2 &mpic 3 1
8a00 0 0 3 &mpic 4 1
8a00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 3 - PCI slot 1 */
8b00 0 0 1 &mpic 2 1
8b00 0 0 2 &mpic 3 1
8b00 0 0 3 &mpic 4 1
8b00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 4 - PCI slot 1 */
8c00 0 0 1 &mpic 2 1
8c00 0 0 2 &mpic 3 1
8c00 0 0 3 &mpic 4 1
8c00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 5 - PCI slot 1 */
8d00 0 0 1 &mpic 2 1
8d00 0 0 2 &mpic 3 1
8d00 0 0 3 &mpic 4 1
8d00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 6 - PCI slot 1 */
8e00 0 0 1 &mpic 2 1
8e00 0 0 2 &mpic 3 1
8e00 0 0 3 &mpic 4 1
8e00 0 0 4 &mpic 1 1
/* IDSEL 0x11 func 7 - PCI slot 1 */
8f00 0 0 1 &mpic 2 1
8f00 0 0 2 &mpic 3 1
8f00 0 0 3 &mpic 4 1
8f00 0 0 4 &mpic 1 1
/* IDSEL 0x12 func 0 - PCI slot 2 */
9000 0 0 1 &mpic 3 1
9000 0 0 2 &mpic 4 1
9000 0 0 3 &mpic 1 1
9000 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 1 - PCI slot 2 */
9100 0 0 1 &mpic 3 1
9100 0 0 2 &mpic 4 1
9100 0 0 3 &mpic 1 1
9100 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 2 - PCI slot 2 */
9200 0 0 1 &mpic 3 1
9200 0 0 2 &mpic 4 1
9200 0 0 3 &mpic 1 1
9200 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 3 - PCI slot 2 */
9300 0 0 1 &mpic 3 1
9300 0 0 2 &mpic 4 1
9300 0 0 3 &mpic 1 1
9300 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 4 - PCI slot 2 */
9400 0 0 1 &mpic 3 1
9400 0 0 2 &mpic 4 1
9400 0 0 3 &mpic 1 1
9400 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 5 - PCI slot 2 */
9500 0 0 1 &mpic 3 1
9500 0 0 2 &mpic 4 1
9500 0 0 3 &mpic 1 1
9500 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 6 - PCI slot 2 */
9600 0 0 1 &mpic 3 1
9600 0 0 2 &mpic 4 1
9600 0 0 3 &mpic 1 1
9600 0 0 4 &mpic 2 1
/* IDSEL 0x12 func 7 - PCI slot 2 */
9700 0 0 1 &mpic 3 1
9700 0 0 2 &mpic 4 1
9700 0 0 3 &mpic 1 1
9700 0 0 4 &mpic 2 1
// IDSEL 0x1c USB // IDSEL 0x1c USB
e000 0 0 0 &i8259 c 2 e000 0 0 1 &i8259 c 2
e100 0 0 0 &i8259 9 2 e100 0 0 1 &i8259 9 2
e200 0 0 0 &i8259 a 2 e200 0 0 1 &i8259 a 2
e300 0 0 0 &i8259 b 2 e300 0 0 1 &i8259 b 2
// IDSEL 0x1d Audio // IDSEL 0x1d Audio
e800 0 0 0 &i8259 6 2 e800 0 0 1 &i8259 6 2
// IDSEL 0x1e Legacy // IDSEL 0x1e Legacy
f000 0 0 0 &i8259 7 2 f000 0 0 1 &i8259 7 2
f100 0 0 0 &i8259 7 2 f100 0 0 1 &i8259 7 2
// IDSEL 0x1f IDE/SATA // IDSEL 0x1f IDE/SATA
f800 0 0 0 &i8259 e 2 f800 0 0 1 &i8259 e 2
f900 0 0 0 &i8259 5 2 f900 0 0 1 &i8259 5 2
>; >;
pcie@0 { pcie@0 {
......
...@@ -774,7 +774,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y ...@@ -774,7 +774,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
CONFIG_RTC_DRV_DS1374=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# #
# DMA Engine support # DMA Engine support
......
...@@ -685,8 +685,21 @@ CONFIG_I2C_MPC=y ...@@ -685,8 +685,21 @@ CONFIG_I2C_MPC=y
# #
# SPI support # SPI support
# #
# CONFIG_SPI is not set CONFIG_SPI=y
# CONFIG_SPI_MASTER is not set CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BITBANG=y
CONFIG_SPI_MPC83xx=y
#
# SPI Protocol Masters
#
# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
# CONFIG_W1 is not set # CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set # CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y CONFIG_HWMON=y
...@@ -710,6 +723,7 @@ CONFIG_HWMON=y ...@@ -710,6 +723,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM70 is not set
# CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM78 is not set
...@@ -896,7 +910,24 @@ CONFIG_USB_MON=y ...@@ -896,7 +910,24 @@ CONFIG_USB_MON=y
# USB Gadget Support # USB Gadget Support
# #
# CONFIG_USB_GADGET is not set # CONFIG_USB_GADGET is not set
# CONFIG_MMC is not set CONFIG_MMC=y
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_UNSAFE_RESUME is not set
#
# MMC/SD Card Drivers
#
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_SDIO_UART is not set
#
# MMC/SD Host Controller Drivers
#
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_WBSD is not set
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MMC_SPI=y
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
...@@ -1101,9 +1132,9 @@ CONFIG_UCC=y ...@@ -1101,9 +1132,9 @@ CONFIG_UCC=y
CONFIG_BITREVERSE=y CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set # CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set # CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y CONFIG_CRC32=y
# CONFIG_CRC7 is not set CONFIG_CRC7=y
# CONFIG_LIBCRC32C is not set # CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y CONFIG_HAS_IOMEM=y
......
...@@ -867,7 +867,7 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y ...@@ -867,7 +867,7 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_FSL=y CONFIG_USB_EHCI_FSL=y
# CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_OHCI_HCD is not set # CONFIG_USB_OHCI_HCD is not set
# CONFIG_USB_UHCI_HCD is not set CONFIG_USB_UHCI_HCD=y
# CONFIG_USB_SL811_HCD is not set # CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_R8A66597_HCD is not set
......
...@@ -760,14 +760,100 @@ CONFIG_USB_SUPPORT=y ...@@ -760,14 +760,100 @@ CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
#
# Miscellaneous USB options
#
# CONFIG_USB_DEVICEFS is not set
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
#
# USB Host Controller Drivers
#
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_SPLIT_ISO is not set
CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_ROOT_HUB_TT=y
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
CONFIG_USB_EHCI_FSL=y CONFIG_USB_EHCI_FSL=y
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_OHCI_HCD is not set
CONFIG_USB_UHCI_HCD=y
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# #
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
# #
#
# may also be needed; see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_LIBUSUAL is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
CONFIG_USB_MON=y
#
# USB port drivers
#
#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_AUERSWALD is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_BERRY_CHARGE is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_PHIDGET is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
#
# USB DSL modem support
#
# #
# USB Gadget Support # USB Gadget Support
# #
......
...@@ -721,7 +721,53 @@ CONFIG_USB_EHCI_FSL=y ...@@ -721,7 +721,53 @@ CONFIG_USB_EHCI_FSL=y
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
CONFIG_RTC_DRV_DS1374=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# #
# DMA Engine support # DMA Engine support
......
...@@ -773,7 +773,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y ...@@ -773,7 +773,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
CONFIG_RTC_DRV_DS1374=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# #
# DMA Engine support # DMA Engine support
......
...@@ -768,7 +768,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y ...@@ -768,7 +768,53 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_NEW_LEDS is not set # CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
CONFIG_RTC_DRV_DS1374=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# #
# DMA Engine support # DMA Engine support
......
...@@ -284,6 +284,10 @@ int main(void) ...@@ -284,6 +284,10 @@ int main(void)
DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32)); DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec)); DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec)); DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64)); DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec)); DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
......
...@@ -19,6 +19,9 @@ ...@@ -19,6 +19,9 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/capability.h> #include <linux/capability.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/smp.h>
#include <linux/completion.h>
#include <linux/cpumask.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/rtas.h> #include <asm/rtas.h>
...@@ -34,6 +37,8 @@ ...@@ -34,6 +37,8 @@
#include <asm/lmb.h> #include <asm/lmb.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/syscalls.h> #include <asm/syscalls.h>
#include <asm/smp.h>
#include <asm/atomic.h>
struct rtas_t rtas = { struct rtas_t rtas = {
.lock = SPIN_LOCK_UNLOCKED .lock = SPIN_LOCK_UNLOCKED
...@@ -41,8 +46,10 @@ struct rtas_t rtas = { ...@@ -41,8 +46,10 @@ struct rtas_t rtas = {
EXPORT_SYMBOL(rtas); EXPORT_SYMBOL(rtas);
struct rtas_suspend_me_data { struct rtas_suspend_me_data {
long waiting; atomic_t working; /* number of cpus accessing this struct */
struct rtas_args *args; int token; /* ibm,suspend-me */
int error;
struct completion *complete; /* wait on this until working == 0 */
}; };
DEFINE_SPINLOCK(rtas_data_buf_lock); DEFINE_SPINLOCK(rtas_data_buf_lock);
...@@ -631,18 +638,18 @@ void rtas_halt(void) ...@@ -631,18 +638,18 @@ void rtas_halt(void)
/* Must be in the RMO region, so we place it here */ /* Must be in the RMO region, so we place it here */
static char rtas_os_term_buf[2048]; static char rtas_os_term_buf[2048];
void rtas_os_term(char *str) void rtas_panic_msg(char *str)
{ {
int status; snprintf(rtas_os_term_buf, 2048, "OS panic: %s", str);
}
if (panic_timeout) void rtas_os_term(void)
return; {
int status;
if (RTAS_UNKNOWN_SERVICE == rtas_token("ibm,os-term")) if (RTAS_UNKNOWN_SERVICE == rtas_token("ibm,os-term"))
return; return;
snprintf(rtas_os_term_buf, 2048, "OS panic: %s", str);
do { do {
status = rtas_call(rtas_token("ibm,os-term"), 1, 1, NULL, status = rtas_call(rtas_token("ibm,os-term"), 1, 1, NULL,
__pa(rtas_os_term_buf)); __pa(rtas_os_term_buf));
...@@ -657,50 +664,62 @@ static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE; ...@@ -657,50 +664,62 @@ static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE;
#ifdef CONFIG_PPC_PSERIES #ifdef CONFIG_PPC_PSERIES
static void rtas_percpu_suspend_me(void *info) static void rtas_percpu_suspend_me(void *info)
{ {
int i;
long rc; long rc;
long flags; unsigned long msr_save;
int cpu;
struct rtas_suspend_me_data *data = struct rtas_suspend_me_data *data =
(struct rtas_suspend_me_data *)info; (struct rtas_suspend_me_data *)info;
/* atomic_inc(&data->working);
* We use "waiting" to indicate our state. As long
* as it is >0, we are still trying to all join up. /* really need to ensure MSR.EE is off for H_JOIN */
* If it goes to 0, we have successfully joined up and msr_save = mfmsr();
* one thread got H_CONTINUE. If any error happens, mtmsr(msr_save & ~(MSR_EE));
* we set it to <0.
*/ rc = plpar_hcall_norets(H_JOIN);
local_irq_save(flags);
do {
rc = plpar_hcall_norets(H_JOIN);
smp_rmb();
} while (rc == H_SUCCESS && data->waiting > 0);
if (rc == H_SUCCESS)
goto out;
if (rc == H_CONTINUE) { mtmsr(msr_save);
data->waiting = 0;
data->args->args[data->args->nargs] = if (rc == H_SUCCESS) {
rtas_call(ibm_suspend_me_token, 0, 1, NULL); /* This cpu was prodded and the suspend is complete. */
for_each_possible_cpu(i) goto out;
plpar_hcall_norets(H_PROD,i); } else if (rc == H_CONTINUE) {
/* All other cpus are in H_JOIN, this cpu does
* the suspend.
*/
printk(KERN_DEBUG "calling ibm,suspend-me on cpu %i\n",
smp_processor_id());
data->error = rtas_call(data->token, 0, 1, NULL);
if (data->error)
printk(KERN_DEBUG "ibm,suspend-me returned %d\n",
data->error);
} else { } else {
data->waiting = -EBUSY; printk(KERN_ERR "H_JOIN on cpu %i failed with rc = %ld\n",
printk(KERN_ERR "Error on H_JOIN hypervisor call\n"); smp_processor_id(), rc);
data->error = rc;
} }
/* This cpu did the suspend or got an error; in either case,
* we need to prod all other other cpus out of join state.
* Extra prods are harmless.
*/
for_each_online_cpu(cpu)
plpar_hcall_norets(H_PROD, get_hard_smp_processor_id(cpu));
out: out:
local_irq_restore(flags); if (atomic_dec_return(&data->working) == 0)
return; complete(data->complete);
} }
static int rtas_ibm_suspend_me(struct rtas_args *args) static int rtas_ibm_suspend_me(struct rtas_args *args)
{ {
int i;
long state; long state;
long rc; long rc;
unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
struct rtas_suspend_me_data data; struct rtas_suspend_me_data data;
DECLARE_COMPLETION_ONSTACK(done);
if (!rtas_service_present("ibm,suspend-me"))
return -ENOSYS;
/* Make sure the state is valid */ /* Make sure the state is valid */
rc = plpar_hcall(H_VASI_STATE, retbuf, rc = plpar_hcall(H_VASI_STATE, retbuf,
...@@ -721,25 +740,23 @@ static int rtas_ibm_suspend_me(struct rtas_args *args) ...@@ -721,25 +740,23 @@ static int rtas_ibm_suspend_me(struct rtas_args *args)
return 0; return 0;
} }
data.waiting = 1; atomic_set(&data.working, 0);
data.args = args; data.token = rtas_token("ibm,suspend-me");
data.error = 0;
data.complete = &done;
/* Call function on all CPUs. One of us will make the /* Call function on all CPUs. One of us will make the
* rtas call * rtas call
*/ */
if (on_each_cpu(rtas_percpu_suspend_me, &data, 1, 0)) if (on_each_cpu(rtas_percpu_suspend_me, &data, 1, 0))
data.waiting = -EINVAL; data.error = -EINVAL;
if (data.waiting != 0) wait_for_completion(&done);
printk(KERN_ERR "Error doing global join\n");
/* Prod each CPU. This won't hurt, and will wake if (data.error != 0)
* anyone we successfully put to sleep with H_JOIN. printk(KERN_ERR "Error doing global join\n");
*/
for_each_possible_cpu(i)
plpar_hcall_norets(H_PROD, i);
return data.waiting; return data.error;
} }
#else /* CONFIG_PPC_PSERIES */ #else /* CONFIG_PPC_PSERIES */
static int rtas_ibm_suspend_me(struct rtas_args *args) static int rtas_ibm_suspend_me(struct rtas_args *args)
......
...@@ -241,8 +241,9 @@ void account_system_vtime(struct task_struct *tsk) ...@@ -241,8 +241,9 @@ void account_system_vtime(struct task_struct *tsk)
/* deltascaled includes both user and system time. /* deltascaled includes both user and system time.
* Hence scale it based on the purr ratio to estimate * Hence scale it based on the purr ratio to estimate
* the system time */ * the system time */
deltascaled = deltascaled * get_paca()->system_time / if (get_paca()->user_time)
(get_paca()->system_time + get_paca()->user_time); deltascaled = deltascaled * get_paca()->system_time /
(get_paca()->system_time + get_paca()->user_time);
delta += get_paca()->system_time; delta += get_paca()->system_time;
get_paca()->system_time = 0; get_paca()->system_time = 0;
} }
......
...@@ -699,11 +699,22 @@ static int __init vdso_init(void) ...@@ -699,11 +699,22 @@ static int __init vdso_init(void)
vdso_data->icache_size = ppc64_caches.isize; vdso_data->icache_size = ppc64_caches.isize;
vdso_data->icache_line_size = ppc64_caches.iline_size; vdso_data->icache_line_size = ppc64_caches.iline_size;
/* XXXOJN: Blocks should be added to ppc64_caches and used instead */
vdso_data->dcache_block_size = ppc64_caches.dline_size;
vdso_data->icache_block_size = ppc64_caches.iline_size;
vdso_data->dcache_log_block_size = ppc64_caches.log_dline_size;
vdso_data->icache_log_block_size = ppc64_caches.log_iline_size;
/* /*
* Calculate the size of the 64 bits vDSO * Calculate the size of the 64 bits vDSO
*/ */
vdso64_pages = (&vdso64_end - &vdso64_start) >> PAGE_SHIFT; vdso64_pages = (&vdso64_end - &vdso64_start) >> PAGE_SHIFT;
DBG("vdso64_kbase: %p, 0x%x pages\n", vdso64_kbase, vdso64_pages); DBG("vdso64_kbase: %p, 0x%x pages\n", vdso64_kbase, vdso64_pages);
#else
vdso_data->dcache_block_size = L1_CACHE_BYTES;
vdso_data->dcache_log_block_size = L1_CACHE_SHIFT;
vdso_data->icache_block_size = L1_CACHE_BYTES;
vdso_data->icache_log_block_size = L1_CACHE_SHIFT;
#endif /* CONFIG_PPC64 */ #endif /* CONFIG_PPC64 */
......
...@@ -23,29 +23,46 @@ ...@@ -23,29 +23,46 @@
* *
* Flushes the data cache & invalidate the instruction cache for the * Flushes the data cache & invalidate the instruction cache for the
* provided range [start, end[ * provided range [start, end[
*
* Note: all CPUs supported by this kernel have a 128 bytes cache
* line size so we don't have to peek that info from the datapage
*/ */
V_FUNCTION_BEGIN(__kernel_sync_dicache) V_FUNCTION_BEGIN(__kernel_sync_dicache)
.cfi_startproc .cfi_startproc
li r5,127 mflr r12
andc r6,r3,r5 /* round low to line bdy */ .cfi_register lr,r12
mr r11,r3
bl __get_datapage@local
mtlr r12
mr r10,r3
lwz r7,CFG_DCACHE_BLOCKSZ(r10)
addi r5,r7,-1
andc r6,r11,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */ subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */ add r8,r8,r5 /* ensure we get enough */
srwi. r8,r8,7 /* compute line count */ lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10)
srw. r8,r8,r9 /* compute line count */
crclr cr0*4+so crclr cr0*4+so
beqlr /* nothing to do? */ beqlr /* nothing to do? */
mtctr r8 mtctr r8
mr r3,r6 1: dcbst 0,r6
1: dcbst 0,r3 add r6,r6,r7
addi r3,r3,128
bdnz 1b bdnz 1b
sync sync
/* Now invalidate the instruction cache */
lwz r7,CFG_ICACHE_BLOCKSZ(r10)
addi r5,r7,-1
andc r6,r11,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */
add r8,r8,r5
lwz r9,CFG_ICACHE_LOGBLOCKSZ(r10)
srw. r8,r8,r9 /* compute line count */
crclr cr0*4+so
beqlr /* nothing to do? */
mtctr r8 mtctr r8
1: icbi 0,r6 2: icbi 0,r6
addi r6,r6,128 add r6,r6,r7
bdnz 1b bdnz 2b
isync isync
li r3,0 li r3,0
blr blr
......
...@@ -23,29 +23,46 @@ ...@@ -23,29 +23,46 @@
* *
* Flushes the data cache & invalidate the instruction cache for the * Flushes the data cache & invalidate the instruction cache for the
* provided range [start, end[ * provided range [start, end[
*
* Note: all CPUs supported by this kernel have a 128 bytes cache
* line size so we don't have to peek that info from the datapage
*/ */
V_FUNCTION_BEGIN(__kernel_sync_dicache) V_FUNCTION_BEGIN(__kernel_sync_dicache)
.cfi_startproc .cfi_startproc
li r5,127 mflr r12
andc r6,r3,r5 /* round low to line bdy */ .cfi_register lr,r12
mr r11,r3
bl V_LOCAL_FUNC(__get_datapage)
mtlr r12
mr r10,r3
lwz r7,CFG_DCACHE_BLOCKSZ(r10)
addi r5,r7,-1
andc r6,r11,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */ subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */ add r8,r8,r5 /* ensure we get enough */
srwi. r8,r8,7 /* compute line count */ lwz r9,CFG_DCACHE_LOGBLOCKSZ(r10)
srw. r8,r8,r9 /* compute line count */
crclr cr0*4+so crclr cr0*4+so
beqlr /* nothing to do? */ beqlr /* nothing to do? */
mtctr r8 mtctr r8
mr r3,r6 1: dcbst 0,r6
1: dcbst 0,r3 add r6,r6,r7
addi r3,r3,128
bdnz 1b bdnz 1b
sync sync
/* Now invalidate the instruction cache */
lwz r7,CFG_ICACHE_BLOCKSZ(r10)
addi r5,r7,-1
andc r6,r11,r5 /* round low to line bdy */
subf r8,r6,r4 /* compute length */
add r8,r8,r5
lwz r9,CFG_ICACHE_LOGBLOCKSZ(r10)
srw. r8,r8,r9 /* compute line count */
crclr cr0*4+so
beqlr /* nothing to do? */
mtctr r8 mtctr r8
1: icbi 0,r6 2: icbi 0,r6
addi r6,r6,128 add r6,r6,r7
bdnz 1b bdnz 2b
isync isync
li r3,0 li r3,0
blr blr
......
...@@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, ...@@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
* we invalidate the TLB here, thus avoiding dcbst * we invalidate the TLB here, thus avoiding dcbst
* misbehaviour. * misbehaviour.
*/ */
_tlbie(address); _tlbie(address, 0 /* 8xx doesn't care about PID */);
#endif #endif
if (!PageReserved(page) if (!PageReserved(page)
&& !test_bit(PG_arch_1, &page->flags)) { && !test_bit(PG_arch_1, &page->flags)) {
......
...@@ -56,7 +56,7 @@ extern unsigned long total_lowmem; ...@@ -56,7 +56,7 @@ extern unsigned long total_lowmem;
* architectures. -- Dan * architectures. -- Dan
*/ */
#if defined(CONFIG_8xx) #if defined(CONFIG_8xx)
#define flush_HPTE(X, va, pg) _tlbie(va) #define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
#define MMU_init_hw() do { } while(0) #define MMU_init_hw() do { } while(0)
#define mmu_mapin_ram() (0UL) #define mmu_mapin_ram() (0UL)
......
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#include <asm/lmb.h> #include <asm/lmb.h>
#include <asm/abs_addr.h> #include <asm/abs_addr.h>
#include <asm/firmware.h> #include <asm/firmware.h>
#include <asm/iseries/hv_call.h>
struct stab_entry { struct stab_entry {
unsigned long esid_data; unsigned long esid_data;
......
...@@ -17,12 +17,13 @@ ...@@ -17,12 +17,13 @@
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/uic.h> #include <asm/uic.h>
#include <asm/of_platform.h>
static struct of_device_id walnut_of_bus[] = { static struct of_device_id walnut_of_bus[] = {
{ .compatible = "ibm,plb3", }, { .compatible = "ibm,plb3", },
......
...@@ -14,12 +14,13 @@ ...@@ -14,12 +14,13 @@
* option) any later version. * option) any later version.
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/uic.h> #include <asm/uic.h>
#include <asm/of_platform.h>
#include "44x.h" #include "44x.h"
static struct of_device_id bamboo_of_bus[] = { static struct of_device_id bamboo_of_bus[] = {
......
...@@ -17,12 +17,13 @@ ...@@ -17,12 +17,13 @@
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/uic.h> #include <asm/uic.h>
#include <asm/of_platform.h>
#include "44x.h" #include "44x.h"
......
...@@ -14,12 +14,13 @@ ...@@ -14,12 +14,13 @@
* option) any later version. * option) any later version.
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/udbg.h> #include <asm/udbg.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/uic.h> #include <asm/uic.h>
#include <asm/of_platform.h>
#include "44x.h" #include "44x.h"
static struct of_device_id sequoia_of_bus[] = { static struct of_device_id sequoia_of_bus[] = {
......
...@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void) ...@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
!= NULL){ != NULL){
/* Reset the Ethernet PHY */ /* Reset the Ethernet PHYs */
bcsr_regs[9] &= ~0x20; #define BCSR8_FETH_RST 0x50
bcsr_regs[8] &= ~BCSR8_FETH_RST;
udelay(1000); udelay(1000);
bcsr_regs[9] |= 0x20; bcsr_regs[8] |= BCSR8_FETH_RST;
iounmap(bcsr_regs); iounmap(bcsr_regs);
of_node_put(np); of_node_put(np);
} }
...@@ -145,30 +146,6 @@ static void __init mpc832x_sys_init_IRQ(void) ...@@ -145,30 +146,6 @@ static void __init mpc832x_sys_init_IRQ(void)
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
} }
#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
extern ulong ds1374_get_rtc_time(void);
extern int ds1374_set_rtc_time(ulong);
static int __init mpc832x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc832x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
tv.tv_nsec = 0;
tv.tv_sec = (ppc_md.get_rtc_time) ();
do_settimeofday(&tv);
return 0;
}
late_initcall(mpc832x_rtc_hookup);
#endif
/* /*
* Called very early, MMU is off, device-tree isn't unflattened * Called very early, MMU is off, device-tree isn't unflattened
*/ */
......
...@@ -15,7 +15,10 @@ ...@@ -15,7 +15,10 @@
*/ */
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
#include <asm/of_platform.h> #include <asm/of_platform.h>
#include <asm/time.h> #include <asm/time.h>
...@@ -46,15 +49,16 @@ static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity) ...@@ -46,15 +49,16 @@ static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
par_io_data_set(3, 13, !polarity); par_io_data_set(3, 13, !polarity);
} }
static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
.ocr_mask = MMC_VDD_33_34,
};
static struct spi_board_info mpc832x_spi_boardinfo = { static struct spi_board_info mpc832x_spi_boardinfo = {
.bus_num = 0x4c0, .bus_num = 0x4c0,
.chip_select = 0, .chip_select = 0,
.max_speed_hz = 50000000, .max_speed_hz = 50000000,
/* .modalias = "mmc_spi",
* XXX: This is spidev (spi in userspace) stub, should .platform_data = &mpc832x_mmc_pdata,
* be replaced by "mmc_spi" when mmc_spi will hit mainline.
*/
.modalias = "spidev",
}; };
static int __init mpc832x_spi_init(void) static int __init mpc832x_spi_init(void)
......
...@@ -106,30 +106,6 @@ static void __init mpc834x_mds_init_IRQ(void) ...@@ -106,30 +106,6 @@ static void __init mpc834x_mds_init_IRQ(void)
ipic_set_default_priority(); ipic_set_default_priority();
} }
#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
extern ulong ds1374_get_rtc_time(void);
extern int ds1374_set_rtc_time(ulong);
static int __init mpc834x_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc834x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
tv.tv_nsec = 0;
tv.tv_sec = (ppc_md.get_rtc_time) ();
do_settimeofday(&tv);
return 0;
}
late_initcall(mpc834x_rtc_hookup);
#endif
/* /*
* Called very early, MMU is off, device-tree isn't unflattened * Called very early, MMU is off, device-tree isn't unflattened
*/ */
......
...@@ -96,14 +96,39 @@ static void __init mpc836x_mds_setup_arch(void) ...@@ -96,14 +96,39 @@ static void __init mpc836x_mds_setup_arch(void)
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
!= NULL){ != NULL){
uint svid;
/* Reset the Ethernet PHY */ /* Reset the Ethernet PHY */
bcsr_regs[9] &= ~0x20; #define BCSR9_GETHRST 0x20
clrbits8(&bcsr_regs[9], BCSR9_GETHRST);
udelay(1000); udelay(1000);
bcsr_regs[9] |= 0x20; setbits8(&bcsr_regs[9], BCSR9_GETHRST);
/* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
svid = mfspr(SPRN_SVR);
if (svid == 0x80480021) {
void __iomem *immap;
immap = ioremap(get_immrbase() + 0x14a8, 8);
/*
* IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
* IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
*/
setbits32(immap, 0x0c003000);
/*
* IMMR + 0x14AC[20:27] = 10101010
* (data delay for both UCC's)
*/
clrsetbits_be32(immap + 4, 0xff0, 0xaa0);
iounmap(immap);
}
iounmap(bcsr_regs); iounmap(bcsr_regs);
of_node_put(np); of_node_put(np);
} }
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
} }
...@@ -152,30 +177,6 @@ static void __init mpc836x_mds_init_IRQ(void) ...@@ -152,30 +177,6 @@ static void __init mpc836x_mds_init_IRQ(void)
#endif /* CONFIG_QUICC_ENGINE */ #endif /* CONFIG_QUICC_ENGINE */
} }
#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
extern ulong ds1374_get_rtc_time(void);
extern int ds1374_set_rtc_time(ulong);
static int __init mpc8360_rtc_hookup(void)
{
struct timespec tv;
if (!machine_is(mpc836x_mds))
return 0;
ppc_md.get_rtc_time = ds1374_get_rtc_time;
ppc_md.set_rtc_time = ds1374_set_rtc_time;
tv.tv_nsec = 0;
tv.tv_sec = (ppc_md.get_rtc_time) ();
do_settimeofday(&tv);
return 0;
}
late_initcall(mpc8360_rtc_hookup);
#endif
/* /*
* Called very early, MMU is off, device-tree isn't unflattened * Called very early, MMU is off, device-tree isn't unflattened
*/ */
......
...@@ -130,7 +130,7 @@ int mpc831x_usb_cfg(void) ...@@ -130,7 +130,7 @@ int mpc831x_usb_cfg(void)
out_be32(immap + MPC83XX_SCCR_OFFS, temp); out_be32(immap + MPC83XX_SCCR_OFFS, temp);
/* Configure pin mux for ULPI. There is no pin mux for UTMI */ /* Configure pin mux for ULPI. There is no pin mux for UTMI */
if (!strcmp(prop, "ulpi")) { if (prop && !strcmp(prop, "ulpi")) {
temp = in_be32(immap + MPC83XX_SICRL_OFFS); temp = in_be32(immap + MPC83XX_SICRL_OFFS);
temp &= ~MPC831X_SICRL_USB_MASK; temp &= ~MPC831X_SICRL_USB_MASK;
temp |= MPC831X_SICRL_USB_ULPI; temp |= MPC831X_SICRL_USB_ULPI;
...@@ -153,13 +153,13 @@ int mpc831x_usb_cfg(void) ...@@ -153,13 +153,13 @@ int mpc831x_usb_cfg(void)
usb_regs = ioremap(res.start, res.end - res.start + 1); usb_regs = ioremap(res.start, res.end - res.start + 1);
/* Using on-chip PHY */ /* Using on-chip PHY */
if (!strcmp(prop, "utmi_wide") || if (prop && (!strcmp(prop, "utmi_wide") ||
!strcmp(prop, "utmi")) { !strcmp(prop, "utmi"))) {
/* Set UTMI_PHY_EN, REFSEL to 48MHZ */ /* Set UTMI_PHY_EN, REFSEL to 48MHZ */
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ); CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ);
/* Using external UPLI PHY */ /* Using external UPLI PHY */
} else if (!strcmp(prop, "ulpi")) { } else if (prop && !strcmp(prop, "ulpi")) {
/* Set PHY_CLK_SEL to ULPI */ /* Set PHY_CLK_SEL to ULPI */
temp = CONTROL_PHY_CLK_SEL_ULPI; temp = CONTROL_PHY_CLK_SEL_ULPI;
#ifdef CONFIG_USB_OTG #ifdef CONFIG_USB_OTG
......
...@@ -171,6 +171,7 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir) ...@@ -171,6 +171,7 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir)
{ {
/* remove all entries */ /* remove all entries */
spufs_prune_dir(dir); spufs_prune_dir(dir);
d_drop(dir);
return simple_rmdir(parent, dir); return simple_rmdir(parent, dir);
} }
......
...@@ -144,6 +144,7 @@ static int __init prpmc2800_probe(void) ...@@ -144,6 +144,7 @@ static int __init prpmc2800_probe(void)
strncpy(prpmc2800_platform_name, m, strncpy(prpmc2800_platform_name, m,
min((int)len, PLATFORM_NAME_MAX - 1)); min((int)len, PLATFORM_NAME_MAX - 1));
_set_L2CR(_get_L2CR() | L2CR_L2E);
return 1; return 1;
} }
......
...@@ -214,7 +214,7 @@ static __init void pas_init_IRQ(void) ...@@ -214,7 +214,7 @@ static __init void pas_init_IRQ(void)
printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
mpic = mpic_alloc(mpic_node, openpic_addr, mpic = mpic_alloc(mpic_node, openpic_addr,
MPIC_PRIMARY|MPIC_LARGE_VECTORS|MPIC_WANTS_RESET, MPIC_PRIMARY|MPIC_LARGE_VECTORS,
0, 0, " PAS-OPIC "); 0, 0, " PAS-OPIC ");
BUG_ON(!mpic); BUG_ON(!mpic);
......
...@@ -21,7 +21,7 @@ config PPC_SPLPAR ...@@ -21,7 +21,7 @@ config PPC_SPLPAR
config EEH config EEH
bool "PCI Extended Error Handling (EEH)" if EMBEDDED bool "PCI Extended Error Handling (EEH)" if EMBEDDED
depends on PPC_PSERIES depends on PPC_PSERIES && PCI
default y if !EMBEDDED default y if !EMBEDDED
config SCANLOG config SCANLOG
......
...@@ -507,7 +507,8 @@ define_machine(pseries) { ...@@ -507,7 +507,8 @@ define_machine(pseries) {
.restart = rtas_restart, .restart = rtas_restart,
.power_off = pSeries_power_off, .power_off = pSeries_power_off,
.halt = rtas_halt, .halt = rtas_halt,
.panic = rtas_os_term, .panic = rtas_panic_msg,
.machine_shutdown = rtas_os_term,
.get_boot_time = rtas_get_boot_time, .get_boot_time = rtas_get_boot_time,
.get_rtc_time = rtas_get_rtc_time, .get_rtc_time = rtas_get_rtc_time,
.set_rtc_time = rtas_set_rtc_time, .set_rtc_time = rtas_set_rtc_time,
......
...@@ -97,6 +97,22 @@ static void uic_ack_irq(unsigned int virq) ...@@ -97,6 +97,22 @@ static void uic_ack_irq(unsigned int virq)
spin_unlock_irqrestore(&uic->lock, flags); spin_unlock_irqrestore(&uic->lock, flags);
} }
static void uic_mask_ack_irq(unsigned int virq)
{
struct uic *uic = get_irq_chip_data(virq);
unsigned int src = uic_irq_to_hw(virq);
unsigned long flags;
u32 er, sr;
sr = 1 << (31-src);
spin_lock_irqsave(&uic->lock, flags);
er = mfdcr(uic->dcrbase + UIC_ER);
er &= ~sr;
mtdcr(uic->dcrbase + UIC_ER, er);
mtdcr(uic->dcrbase + UIC_SR, sr);
spin_unlock_irqrestore(&uic->lock, flags);
}
static int uic_set_irq_type(unsigned int virq, unsigned int flow_type) static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
{ {
struct uic *uic = get_irq_chip_data(virq); struct uic *uic = get_irq_chip_data(virq);
...@@ -152,7 +168,7 @@ static struct irq_chip uic_irq_chip = { ...@@ -152,7 +168,7 @@ static struct irq_chip uic_irq_chip = {
.typename = " UIC ", .typename = " UIC ",
.unmask = uic_unmask_irq, .unmask = uic_unmask_irq,
.mask = uic_mask_irq, .mask = uic_mask_irq,
/* .mask_ack = uic_mask_irq_and_ack, */ .mask_ack = uic_mask_ack_irq,
.ack = uic_ack_irq, .ack = uic_ack_irq,
.set_type = uic_set_irq_type, .set_type = uic_set_irq_type,
}; };
......
...@@ -312,7 +312,14 @@ early_init(int r3, int r4, int r5) ...@@ -312,7 +312,14 @@ early_init(int r3, int r4, int r5)
* Identify the CPU type and fix up code sections * Identify the CPU type and fix up code sections
* that depend on which cpu we have. * that depend on which cpu we have.
*/ */
#if defined(CONFIG_440EP) && defined(CONFIG_PPC_FPU)
/* We pass the virtual PVR here for 440EP as 440EP and 440GR have
* identical PVRs and there is no reliable way to check for the FPU
*/
spec = identify_cpu(offset, (mfspr(SPRN_PVR) | 0x8));
#else
spec = identify_cpu(offset, mfspr(SPRN_PVR)); spec = identify_cpu(offset, mfspr(SPRN_PVR));
#endif
do_feature_fixups(spec->cpu_features, do_feature_fixups(spec->cpu_features,
PTRRELOC(&__start___ftr_fixup), PTRRELOC(&__start___ftr_fixup),
PTRRELOC(&__stop___ftr_fixup)); PTRRELOC(&__stop___ftr_fixup));
......
...@@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, ...@@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
* That means the zeroed TLB has to be invalidated * That means the zeroed TLB has to be invalidated
* whenever a page miss occurs. * whenever a page miss occurs.
*/ */
_tlbie(address); _tlbie(address, 0 /* 8xx doesn't care about PID */);
#endif #endif
if (!PageReserved(page) if (!PageReserved(page)
&& !test_bit(PG_arch_1, &page->flags)) { && !test_bit(PG_arch_1, &page->flags)) {
......
...@@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries; ...@@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries;
* architectures. -- Dan * architectures. -- Dan
*/ */
#if defined(CONFIG_8xx) #if defined(CONFIG_8xx)
#define flush_HPTE(X, va, pg) _tlbie(va) #define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
#define MMU_init_hw() do { } while(0) #define MMU_init_hw() do { } while(0)
#define mmu_mapin_ram() (0UL) #define mmu_mapin_ram() (0UL)
......
...@@ -211,6 +211,7 @@ static void __init yucca_setup_pcie_fpga_rootpoint(int port) ...@@ -211,6 +211,7 @@ static void __init yucca_setup_pcie_fpga_rootpoint(int port)
break; break;
default: default:
iounmap(pcie_reg_fpga_base);
return; return;
} }
......
...@@ -87,6 +87,29 @@ ...@@ -87,6 +87,29 @@
}, \ }, \
} }
#define XPAR_AC97_CONTROLLER_REFERENCE(num) { \
.name = "ml403_ac97cr", \
.id = num, \
.num_resources = 3, \
.resource = (struct resource[]) { \
{ \
.start = XPAR_OPB_AC97_CONTROLLER_REF_##num##_BASEADDR, \
.end = XPAR_OPB_AC97_CONTROLLER_REF_##num##_HIGHADDR, \
.flags = IORESOURCE_MEM, \
}, \
{ \
.start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \
.end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \
.flags = IORESOURCE_IRQ, \
}, \
{ \
.start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \
.end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \
.flags = IORESOURCE_IRQ, \
}, \
}, \
}
/* UART 8250 driver platform data table */ /* UART 8250 driver platform data table */
struct plat_serial8250_port virtex_serial_platform_data[] = { struct plat_serial8250_port virtex_serial_platform_data[] = {
#if defined(XPAR_UARTNS550_0_BASEADDR) #if defined(XPAR_UARTNS550_0_BASEADDR)
...@@ -173,6 +196,14 @@ struct platform_device virtex_platform_devices[] = { ...@@ -173,6 +196,14 @@ struct platform_device virtex_platform_devices[] = {
#if defined(XPAR_TFT_3_BASEADDR) #if defined(XPAR_TFT_3_BASEADDR)
XPAR_TFT(3), XPAR_TFT(3),
#endif #endif
/* AC97 Controller Reference instances */
#if defined(XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR)
XPAR_AC97_CONTROLLER_REFERENCE(0),
#endif
#if defined(XPAR_OPB_AC97_CONTROLLER_REF_1_BASEADDR)
XPAR_AC97_CONTROLLER_REFERENCE(1),
#endif
}; };
/* Early serial support functions */ /* Early serial support functions */
......
...@@ -6,6 +6,10 @@ ...@@ -6,6 +6,10 @@
#define PPC_MEMSTART 0 #define PPC_MEMSTART 0
#ifdef CONFIG_NOT_COHERENT_CACHE
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#endif
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
/* /*
* The basic type of a PTE - 64 bits for those CPUs with > 32 bit * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
......
...@@ -246,7 +246,6 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) ...@@ -246,7 +246,6 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
return PCI_DN(busdn)->phb; return PCI_DN(busdn)->phb;
} }
extern void pcibios_free_controller(struct pci_controller *phb);
extern void isa_bridge_find_early(struct pci_controller *hose); extern void isa_bridge_find_early(struct pci_controller *hose);
...@@ -282,9 +281,11 @@ extern void ...@@ -282,9 +281,11 @@ extern void
pci_process_bridge_OF_ranges(struct pci_controller *hose, pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int primary); struct device_node *dev, int primary);
/* Allocate a new PCI host bridge structure */ /* Allocate & free a PCI host bridge structure */
extern struct pci_controller * extern struct pci_controller *
pcibios_alloc_controller(struct device_node *dev); pcibios_alloc_controller(struct device_node *dev);
extern void pcibios_free_controller(struct pci_controller *phb);
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
extern unsigned long pci_address_to_pio(phys_addr_t address); extern unsigned long pci_address_to_pio(phys_addr_t address);
extern int pcibios_vaddr_is_ioport(void __iomem *address); extern int pcibios_vaddr_is_ioport(void __iomem *address);
......
...@@ -164,7 +164,8 @@ extern int rtas_call(int token, int, int, int *, ...); ...@@ -164,7 +164,8 @@ extern int rtas_call(int token, int, int, int *, ...);
extern void rtas_restart(char *cmd); extern void rtas_restart(char *cmd);
extern void rtas_power_off(void); extern void rtas_power_off(void);
extern void rtas_halt(void); extern void rtas_halt(void);
extern void rtas_os_term(char *str); extern void rtas_panic_msg(char *str);
extern void rtas_os_term(void);
extern int rtas_get_sensor(int sensor, int index, int *state); extern int rtas_get_sensor(int sensor, int index, int *state);
extern int rtas_get_power_level(int powerdomain, int *level); extern int rtas_get_power_level(int powerdomain, int *level);
extern int rtas_set_power_level(int powerdomain, int level, int *setlevel); extern int rtas_set_power_level(int powerdomain, int level, int *setlevel);
......
...@@ -77,6 +77,10 @@ struct vdso_data { ...@@ -77,6 +77,10 @@ struct vdso_data {
/* those additional ones don't have to be located anywhere /* those additional ones don't have to be located anywhere
* special as they were not part of the original systemcfg * special as they were not part of the original systemcfg
*/ */
__u32 dcache_block_size; /* L1 d-cache block size */
__u32 icache_block_size; /* L1 i-cache block size */
__u32 dcache_log_block_size; /* L1 d-cache log block size */
__u32 icache_log_block_size; /* L1 i-cache log block size */
__s32 wtom_clock_sec; /* Wall to monotonic clock */ __s32 wtom_clock_sec; /* Wall to monotonic clock */
__s32 wtom_clock_nsec; __s32 wtom_clock_nsec;
__u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */ __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
...@@ -99,6 +103,10 @@ struct vdso_data { ...@@ -99,6 +103,10 @@ struct vdso_data {
__s32 wtom_clock_sec; /* Wall to monotonic clock */ __s32 wtom_clock_sec; /* Wall to monotonic clock */
__s32 wtom_clock_nsec; __s32 wtom_clock_nsec;
__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
__u32 dcache_block_size; /* L1 d-cache block size */
__u32 icache_block_size; /* L1 i-cache block size */
__u32 dcache_log_block_size; /* L1 d-cache log block size */
__u32 icache_log_block_size; /* L1 i-cache log block size */
}; };
#endif /* CONFIG_PPC64 */ #endif /* CONFIG_PPC64 */
......
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