Commit dca009e7 authored by Xiaojie Yuan's avatar Xiaojie Yuan Committed by Alex Deucher

drm/amdgpu: enable gfx clock gatings for navi12

enables following gfx clock gating features:

- medium grained clock gating
- medium grained light sleep
- coarse grained clock gating
- cp memory light sleep
- rlc memory light sleep

CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it.
Signed-off-by: default avatarXiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 05677c95
...@@ -641,7 +641,11 @@ static int nv_common_early_init(void *handle) ...@@ -641,7 +641,11 @@ static int nv_common_early_init(void *handle)
adev->external_rev_id = adev->rev_id + 20; adev->external_rev_id = adev->rev_id + 20;
break; break;
case CHIP_NAVI12: case CHIP_NAVI12:
adev->cg_flags = 0; adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
AMD_CG_SUPPORT_GFX_MGLS |
AMD_CG_SUPPORT_GFX_CGCG |
AMD_CG_SUPPORT_GFX_CP_LS |
AMD_CG_SUPPORT_GFX_RLC_LS;
adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG; adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
adev->external_rev_id = adev->rev_id + 0xa; adev->external_rev_id = adev->rev_id + 0xa;
break; break;
......
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