Commit df3f4cd0 authored by Bart Van Assche's avatar Bart Van Assche Committed by James Bottomley

qla2xxx: Replace two macros with an inline function

Replace the QLA82XX_ADDR_IN_RANGE() and QLA8044_ADDR_IN_RANGE() macros
with the inline function addr_in_range(). This avoids that the compiler
reports the following warning when building with W=1: comparison of
unsigned expression >= 0 is always true.
Signed-off-by: default avatarBart Van Assche <bart.vanassche@sandisk.com>
Acked-by: default avatarHimanshu Madhani <himanshu.madhani@qlogic.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Odin.com>
parent 52c82823
...@@ -547,9 +547,6 @@ void qla82xx_idc_unlock(struct qla_hw_data *ha) ...@@ -547,9 +547,6 @@ void qla82xx_idc_unlock(struct qla_hw_data *ha)
qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK));
} }
/* PCI Windowing for DDR regions. */
#define QLA82XX_ADDR_IN_RANGE(addr, low, high) \
(((addr) <= (high)) && ((addr) >= (low)))
/* /*
* check memory access boundary. * check memory access boundary.
* used by test agent. support ddr access only for now * used by test agent. support ddr access only for now
...@@ -558,9 +555,9 @@ static unsigned long ...@@ -558,9 +555,9 @@ static unsigned long
qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, qla82xx_pci_mem_bound_check(struct qla_hw_data *ha,
unsigned long long addr, int size) unsigned long long addr, int size)
{ {
if (!QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_DDR_NET, if (!addr_in_range(addr, QLA82XX_ADDR_DDR_NET,
QLA82XX_ADDR_DDR_NET_MAX) || QLA82XX_ADDR_DDR_NET_MAX) ||
!QLA82XX_ADDR_IN_RANGE(addr + size - 1, QLA82XX_ADDR_DDR_NET, !addr_in_range(addr + size - 1, QLA82XX_ADDR_DDR_NET,
QLA82XX_ADDR_DDR_NET_MAX) || QLA82XX_ADDR_DDR_NET_MAX) ||
((size != 1) && (size != 2) && (size != 4) && (size != 8))) ((size != 1) && (size != 2) && (size != 4) && (size != 8)))
return 0; return 0;
...@@ -577,7 +574,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) ...@@ -577,7 +574,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr)
u32 win_read; u32 win_read;
scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_DDR_NET, if (addr_in_range(addr, QLA82XX_ADDR_DDR_NET,
QLA82XX_ADDR_DDR_NET_MAX)) { QLA82XX_ADDR_DDR_NET_MAX)) {
/* DDR network side */ /* DDR network side */
window = MN_WIN(addr); window = MN_WIN(addr);
...@@ -592,7 +589,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) ...@@ -592,7 +589,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr)
__func__, window, win_read); __func__, window, win_read);
} }
addr = GET_MEM_OFFS_2M(addr) + QLA82XX_PCI_DDR_NET; addr = GET_MEM_OFFS_2M(addr) + QLA82XX_PCI_DDR_NET;
} else if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_OCM0, } else if (addr_in_range(addr, QLA82XX_ADDR_OCM0,
QLA82XX_ADDR_OCM0_MAX)) { QLA82XX_ADDR_OCM0_MAX)) {
unsigned int temp1; unsigned int temp1;
if ((addr & 0x00ff800) == 0xff800) { if ((addr & 0x00ff800) == 0xff800) {
...@@ -615,7 +612,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) ...@@ -615,7 +612,7 @@ qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr)
} }
addr = GET_MEM_OFFS_2M(addr) + QLA82XX_PCI_OCM0_2M; addr = GET_MEM_OFFS_2M(addr) + QLA82XX_PCI_OCM0_2M;
} else if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_QDR_NET, } else if (addr_in_range(addr, QLA82XX_ADDR_QDR_NET,
QLA82XX_P3_ADDR_QDR_NET_MAX)) { QLA82XX_P3_ADDR_QDR_NET_MAX)) {
/* QDR network side */ /* QDR network side */
window = MS_WIN(addr); window = MS_WIN(addr);
...@@ -656,16 +653,16 @@ static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, ...@@ -656,16 +653,16 @@ static int qla82xx_pci_is_same_window(struct qla_hw_data *ha,
qdr_max = QLA82XX_P3_ADDR_QDR_NET_MAX; qdr_max = QLA82XX_P3_ADDR_QDR_NET_MAX;
/* DDR network side */ /* DDR network side */
if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_DDR_NET, if (addr_in_range(addr, QLA82XX_ADDR_DDR_NET,
QLA82XX_ADDR_DDR_NET_MAX)) QLA82XX_ADDR_DDR_NET_MAX))
BUG(); BUG();
else if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_OCM0, else if (addr_in_range(addr, QLA82XX_ADDR_OCM0,
QLA82XX_ADDR_OCM0_MAX)) QLA82XX_ADDR_OCM0_MAX))
return 1; return 1;
else if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_OCM1, else if (addr_in_range(addr, QLA82XX_ADDR_OCM1,
QLA82XX_ADDR_OCM1_MAX)) QLA82XX_ADDR_OCM1_MAX))
return 1; return 1;
else if (QLA82XX_ADDR_IN_RANGE(addr, QLA82XX_ADDR_QDR_NET, qdr_max)) { else if (addr_in_range(addr, QLA82XX_ADDR_QDR_NET, qdr_max)) {
/* QDR network side */ /* QDR network side */
window = ((addr - QLA82XX_ADDR_QDR_NET) >> 22) & 0x3f; window = ((addr - QLA82XX_ADDR_QDR_NET) >> 22) & 0x3f;
if (ha->qdr_sn_window == window) if (ha->qdr_sn_window == window)
......
...@@ -1129,9 +1129,9 @@ qla8044_ms_mem_write_128b(struct scsi_qla_host *vha, ...@@ -1129,9 +1129,9 @@ qla8044_ms_mem_write_128b(struct scsi_qla_host *vha,
} }
for (i = 0; i < count; i++, addr += 16) { for (i = 0; i < count; i++, addr += 16) {
if (!((QLA8044_ADDR_IN_RANGE(addr, QLA8044_ADDR_QDR_NET, if (!((addr_in_range(addr, QLA8044_ADDR_QDR_NET,
QLA8044_ADDR_QDR_NET_MAX)) || QLA8044_ADDR_QDR_NET_MAX)) ||
(QLA8044_ADDR_IN_RANGE(addr, QLA8044_ADDR_DDR_NET, (addr_in_range(addr, QLA8044_ADDR_DDR_NET,
QLA8044_ADDR_DDR_NET_MAX)))) { QLA8044_ADDR_DDR_NET_MAX)))) {
ret_val = QLA_FUNCTION_FAILED; ret_val = QLA_FUNCTION_FAILED;
goto exit_ms_mem_write_unlock; goto exit_ms_mem_write_unlock;
......
...@@ -58,8 +58,10 @@ ...@@ -58,8 +58,10 @@
#define QLA8044_PCI_QDR_NET_MAX ((unsigned long)0x043fffff) #define QLA8044_PCI_QDR_NET_MAX ((unsigned long)0x043fffff)
/* PCI Windowing for DDR regions. */ /* PCI Windowing for DDR regions. */
#define QLA8044_ADDR_IN_RANGE(addr, low, high) \ static inline bool addr_in_range(u64 addr, u64 low, u64 high)
(((addr) <= (high)) && ((addr) >= (low))) {
return addr <= high && addr >= low;
}
/* Indirectly Mapped Registers */ /* Indirectly Mapped Registers */
#define QLA8044_FLASH_SPI_STATUS 0x2808E010 #define QLA8044_FLASH_SPI_STATUS 0x2808E010
......
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