Commit e09d51ad authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A few more fixes that have come in, and one revert of a previous fix.

  I was a bit too trigger happy to enable PREEMPT on multi_v7_defconfig,
  and it ended up regressing at least BeagleBone XM boards. While we get
  that debugged for next merge window, let's disable it again.

  Beyond that:

   - Stratix change to fix multicast filtering

   - Minor DT fixes for Renesas and i.MX

   - Ethernet fix for a Renesas board (switching main interfaces)

   - Ethernet phy regulator fix for i.MX6SX"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  arm64: dts: stratix10: fix multicast filtering
  ARM: defconfig: Disable PREEMPT again on  multi_v7
  arm64: dts: renesas: condor: switch from EtherAVB to GEther
  dt-bindings: arm: Fix RZ/G2E part number
  arm64: dts: renesas: r8a7795: add missing dma-names on hscif2
  ARM: dts: imx6sx-sdb: Fix enet phy regulator
  ARM: dts: fsl: Fix improperly quoted stdout-path values
  ARM: dts: imx6sll: fix typo for fsl,imx6sll-i2c node
parents ecb4d529 a89f84a5
...@@ -27,7 +27,7 @@ SoCs: ...@@ -27,7 +27,7 @@ SoCs:
compatible = "renesas,r8a77470" compatible = "renesas,r8a77470"
- RZ/G2M (R8A774A1) - RZ/G2M (R8A774A1)
compatible = "renesas,r8a774a1" compatible = "renesas,r8a774a1"
- RZ/G2E (RA8774C0) - RZ/G2E (R8A774C0)
compatible = "renesas,r8a774c0" compatible = "renesas,r8a774c0"
- R-Car M1A (R8A77781) - R-Car M1A (R8A77781)
compatible = "renesas,r8a7778" compatible = "renesas,r8a7778"
......
...@@ -55,7 +55,7 @@ aliases { ...@@ -55,7 +55,7 @@ aliases {
}; };
chosen { chosen {
stdout-path = "&uart1:115200n8"; stdout-path = "serial0:115200n8";
}; };
memory@70000000 { memory@70000000 {
......
...@@ -740,7 +740,7 @@ usdhc3: mmc@2198000 { ...@@ -740,7 +740,7 @@ usdhc3: mmc@2198000 {
i2c1: i2c@21a0000 { i2c1: i2c@21a0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
reg = <0x021a0000 0x4000>; reg = <0x021a0000 0x4000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_I2C1>; clocks = <&clks IMX6SLL_CLK_I2C1>;
......
...@@ -117,7 +117,9 @@ reg_enet_3v3: regulator-enet-3v3 { ...@@ -117,7 +117,9 @@ reg_enet_3v3: regulator-enet-3v3 {
regulator-name = "enet_3v3"; regulator-name = "enet_3v3";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
regulator-boot-on;
regulator-always-on;
}; };
reg_pcie_gpio: regulator-pcie-gpio { reg_pcie_gpio: regulator-pcie-gpio {
...@@ -180,6 +182,7 @@ &fec1 { ...@@ -180,6 +182,7 @@ &fec1 {
phy-supply = <&reg_enet_3v3>; phy-supply = <&reg_enet_3v3>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
mdio { mdio {
...@@ -373,6 +376,8 @@ MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081 ...@@ -373,6 +376,8 @@ MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081 MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91 MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
/* phy reset */
MX6SX_PAD_ENET2_CRS__GPIO2_IO_7 0x10b0
>; >;
}; };
......
...@@ -50,8 +50,8 @@ / { ...@@ -50,8 +50,8 @@ / {
compatible = "fsl,vf610m4"; compatible = "fsl,vf610m4";
chosen { chosen {
bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw"; bootargs = "clk_ignore_unused init=/linuxrc rw";
stdout-path = "&uart2"; stdout-path = "serial2:115200";
}; };
memory@8c000000 { memory@8c000000 {
......
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_CGROUPS=y CONFIG_CGROUPS=y
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y CONFIG_EMBEDDED=y
......
...@@ -139,6 +139,7 @@ gmac0: ethernet@ff800000 { ...@@ -139,6 +139,7 @@ gmac0: ethernet@ff800000 {
clock-names = "stmmaceth"; clock-names = "stmmaceth";
tx-fifo-depth = <16384>; tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>; rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
status = "disabled"; status = "disabled";
}; };
...@@ -154,6 +155,7 @@ gmac1: ethernet@ff802000 { ...@@ -154,6 +155,7 @@ gmac1: ethernet@ff802000 {
clock-names = "stmmaceth"; clock-names = "stmmaceth";
tx-fifo-depth = <16384>; tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>; rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
status = "disabled"; status = "disabled";
}; };
...@@ -169,6 +171,7 @@ gmac2: ethernet@ff804000 { ...@@ -169,6 +171,7 @@ gmac2: ethernet@ff804000 {
clock-names = "stmmaceth"; clock-names = "stmmaceth";
tx-fifo-depth = <16384>; tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>; rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -652,7 +652,7 @@ hscif2: serial@e6560000 { ...@@ -652,7 +652,7 @@ hscif2: serial@e6560000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>, dmas = <&dmac1 0x35>, <&dmac1 0x34>,
<&dmac2 0x35>, <&dmac2 0x34>; <&dmac2 0x35>, <&dmac2 0x34>;
dma-names = "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 518>; resets = <&cpg 518>;
status = "disabled"; status = "disabled";
......
...@@ -15,7 +15,7 @@ / { ...@@ -15,7 +15,7 @@ / {
aliases { aliases {
serial0 = &scif0; serial0 = &scif0;
ethernet0 = &avb; ethernet0 = &gether;
}; };
chosen { chosen {
...@@ -97,23 +97,6 @@ x1_clk: x1-clock { ...@@ -97,23 +97,6 @@ x1_clk: x1-clock {
}; };
}; };
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
};
};
&canfd { &canfd {
pinctrl-0 = <&canfd0_pins>; pinctrl-0 = <&canfd0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -139,6 +122,23 @@ &extalr_clk { ...@@ -139,6 +122,23 @@ &extalr_clk {
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
&gether {
pinctrl-0 = <&gether_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c0 { &i2c0 {
pinctrl-0 = <&i2c0_pins>; pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -236,16 +236,17 @@ &pcie_phy { ...@@ -236,16 +236,17 @@ &pcie_phy {
}; };
&pfc { &pfc {
avb_pins: avb {
groups = "avb_mdio", "avb_rgmii";
function = "avb";
};
canfd0_pins: canfd0 { canfd0_pins: canfd0 {
groups = "canfd0_data_a"; groups = "canfd0_data_a";
function = "canfd0"; function = "canfd0";
}; };
gether_pins: gether {
groups = "gether_mdio_a", "gether_rgmii",
"gether_txcrefclk", "gether_txcrefclk_mega";
function = "gether";
};
i2c0_pins: i2c0 { i2c0_pins: i2c0 {
groups = "i2c0"; groups = "i2c0";
function = "i2c0"; function = "i2c0";
......
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