Commit e1ffceb0 authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo

ARM: imx53: qsrb: fix PMIC interrupt level

The MC34708 PMIC interrupt level is active high, but was set to
active low in the devicetree, probably as a result of a copy and
paste error from the QSB board.

This caused IRQ storms and led to the kernel disabling the PMIC
interrupt.
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 34adba71
...@@ -36,7 +36,7 @@ pmic: mc34708@8 { ...@@ -36,7 +36,7 @@ pmic: mc34708@8 {
pinctrl-0 = <&pinctrl_pmic>; pinctrl-0 = <&pinctrl_pmic>;
reg = <0x08>; reg = <0x08>;
interrupt-parent = <&gpio5>; interrupt-parent = <&gpio5>;
interrupts = <23 0x8>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
regulators { regulators {
sw1_reg: sw1a { sw1_reg: sw1a {
regulator-name = "SW1"; regulator-name = "SW1";
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment