Commit e2c31b3f authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt

ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix

Fix the sh73a0 external IRQ pin code to properly support
CONFIG_SPARSE_IRQ=y by allocating IRQ descriptors for the
cascaded IRQs associated with external IRQ pins.

Without this fix it is impossible to request IRQ0->IRQ31
on the Kota2 board when sparse IRQs are enabled.
Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 0df1a838
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/sh_intc.h> #include <linux/sh_intc.h>
...@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void) ...@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]); setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k))); n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
irq_set_chip_and_handler_name(n, &intca_gic_irq_chip, irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
handle_level_irq, "level"); handle_level_irq, "level");
set_irq_flags(n, IRQF_VALID); /* yuck */ set_irq_flags(n, IRQF_VALID); /* yuck */
......
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