Commit e393bc09 authored by Kukjin Kim's avatar Kukjin Kim

mtd: onenand: remove s5pc100 related onenand codes

This patch removes s5pc100 related onenand codes because of no more
support for S5PC100 SoC in mainline.

Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent f34b89bf
...@@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2 ...@@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2
config MTD_ONENAND_SAMSUNG config MTD_ONENAND_SAMSUNG
tristate "OneNAND on Samsung SOC controller support" tristate "OneNAND on Samsung SOC controller support"
depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4 depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4
help help
Support for a OneNAND flash device connected to an Samsung SOC. Support for a OneNAND flash device connected to an Samsung SOC.
S3C64XX/S5PC100 use command mapping method. S3C64XX uses command mapping method.
S5PC110/S5PC210 use generic OneNAND method. S5PC110/S5PC210 use generic OneNAND method.
config MTD_ONENAND_OTP config MTD_ONENAND_OTP
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* Implementation: * Implementation:
* S3C64XX and S5PC100: emulate the pseudo BufferRAM * S3C64XX: emulate the pseudo BufferRAM
* S5PC110: use DMA * S5PC110: use DMA
*/ */
...@@ -32,7 +32,6 @@ ...@@ -32,7 +32,6 @@
enum soc_type { enum soc_type {
TYPE_S3C6400, TYPE_S3C6400,
TYPE_S3C6410, TYPE_S3C6410,
TYPE_S5PC100,
TYPE_S5PC110, TYPE_S5PC110,
}; };
...@@ -59,7 +58,6 @@ enum soc_type { ...@@ -59,7 +58,6 @@ enum soc_type {
#define MAP_11 (0x3) #define MAP_11 (0x3)
#define S3C64XX_CMD_MAP_SHIFT 24 #define S3C64XX_CMD_MAP_SHIFT 24
#define S5PC100_CMD_MAP_SHIFT 26
#define S3C6400_FBA_SHIFT 10 #define S3C6400_FBA_SHIFT 10
#define S3C6400_FPA_SHIFT 4 #define S3C6400_FPA_SHIFT 4
...@@ -69,10 +67,6 @@ enum soc_type { ...@@ -69,10 +67,6 @@ enum soc_type {
#define S3C6410_FPA_SHIFT 6 #define S3C6410_FPA_SHIFT 6
#define S3C6410_FSA_SHIFT 4 #define S3C6410_FSA_SHIFT 4
#define S5PC100_FBA_SHIFT 13
#define S5PC100_FPA_SHIFT 7
#define S5PC100_FSA_SHIFT 5
/* S5PC110 specific definitions */ /* S5PC110 specific definitions */
#define S5PC110_DMA_SRC_ADDR 0x400 #define S5PC110_DMA_SRC_ADDR 0x400
#define S5PC110_DMA_SRC_CFG 0x404 #define S5PC110_DMA_SRC_CFG 0x404
...@@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val) ...@@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val)
return (type << S3C64XX_CMD_MAP_SHIFT) | val; return (type << S3C64XX_CMD_MAP_SHIFT) | val;
} }
static unsigned int s5pc1xx_cmd_map(unsigned type, unsigned val)
{
return (type << S5PC100_CMD_MAP_SHIFT) | val;
}
static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa) static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa)
{ {
return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) | return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) |
...@@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa) ...@@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa)
(fsa << S3C6410_FSA_SHIFT); (fsa << S3C6410_FSA_SHIFT);
} }
static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa)
{
return (fba << S5PC100_FBA_SHIFT) | (fpa << S5PC100_FPA_SHIFT) |
(fsa << S5PC100_FSA_SHIFT);
}
static void s3c_onenand_reset(void) static void s3c_onenand_reset(void)
{ {
unsigned long timeout = 0x10000; unsigned long timeout = 0x10000;
...@@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd) ...@@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
} else if (onenand->type == TYPE_S3C6410) { } else if (onenand->type == TYPE_S3C6410) {
onenand->mem_addr = s3c6410_mem_addr; onenand->mem_addr = s3c6410_mem_addr;
onenand->cmd_map = s3c64xx_cmd_map; onenand->cmd_map = s3c64xx_cmd_map;
} else if (onenand->type == TYPE_S5PC100) {
onenand->mem_addr = s5pc100_mem_addr;
onenand->cmd_map = s5pc1xx_cmd_map;
} else if (onenand->type == TYPE_S5PC110) { } else if (onenand->type == TYPE_S5PC110) {
/* Use generic onenand functions */ /* Use generic onenand functions */
this->read_bufferram = s5pc110_read_bufferram; this->read_bufferram = s5pc110_read_bufferram;
...@@ -1110,9 +1090,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = { ...@@ -1110,9 +1090,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = {
}, { }, {
.name = "s3c6410-onenand", .name = "s3c6410-onenand",
.driver_data = TYPE_S3C6410, .driver_data = TYPE_S3C6410,
}, {
.name = "s5pc100-onenand",
.driver_data = TYPE_S5PC100,
}, { }, {
.name = "s5pc110-onenand", .name = "s5pc110-onenand",
.driver_data = TYPE_S5PC110, .driver_data = TYPE_S5PC110,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment