Commit e4085d54 authored by Len Brown's avatar Len Brown Committed by Rafael J. Wysocki

tools/power turbostat: initial BXT support

Broxton has a lot in common with SKL
Signed-off-by: default avatarLen Brown <len.brown@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 5a63426e
...@@ -1298,6 +1298,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, ...@@ -1298,6 +1298,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S,
int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
static void static void
...@@ -2199,6 +2200,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) ...@@ -2199,6 +2200,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
case 0x57: /* PHI */ case 0x57: /* PHI */
pkg_cstate_limits = phi_pkg_cstate_limits; pkg_cstate_limits = phi_pkg_cstate_limits;
break; break;
case 0x5C: /* BXT */
pkg_cstate_limits = bxt_pkg_cstate_limits;
break;
default: default:
return 0; return 0;
} }
...@@ -2628,6 +2632,9 @@ void rapl_probe(unsigned int family, unsigned int model) ...@@ -2628,6 +2632,9 @@ void rapl_probe(unsigned int family, unsigned int model)
case 0x47: /* BDW */ case 0x47: /* BDW */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
break; break;
case 0x5C: /* BXT */
do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
break;
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
...@@ -2914,6 +2921,7 @@ int has_snb_msrs(unsigned int family, unsigned int model) ...@@ -2914,6 +2921,7 @@ int has_snb_msrs(unsigned int family, unsigned int model)
case 0x56: /* BDX-DE */ case 0x56: /* BDX-DE */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x5C: /* BXT */
return 1; return 1;
} }
return 0; return 0;
...@@ -2941,6 +2949,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model) ...@@ -2941,6 +2949,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
case 0x3D: /* BDW */ case 0x3D: /* BDW */
case 0x4E: /* SKL */ case 0x4E: /* SKL */
case 0x5E: /* SKL */ case 0x5E: /* SKL */
case 0x5C: /* BXT */
return 1; return 1;
} }
return 0; return 0;
......
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