ARM: dts: exynos: Interrupt for USB DWC3-1 differs between Exynos5420 and 5410

On Exynos5410 the SPI interrupt for second USB DWC3 (called DRD: Dual
Role Device) is different - 200 instead of 73.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

arch/arm/boot/dts/exynos5410.dtsi

@@ -16,6 +16,7 @@
 #include "exynos54xx.dtsi"
 #include "exynos-syscon-restart.dtsi"
 #include <dt-bindings/clock/exynos5410.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
 	compatible = "samsung,exynos5410", "samsung,exynos5";
@@ -267,6 +268,10 @@ &usbdrd3_1 {
 	clock-names = "usbdrd30";
 };
 
+&usbdrd_dwc3_1 {
+	interrupts = <GIC_SPI 200 0>;
+};
+
 &usbdrd_phy1 {
 	clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
 	clock-names = "phy", "ref";

arch/arm/boot/dts/exynos5420.dtsi

@@ -16,6 +16,7 @@
 #include "exynos54xx.dtsi"
 #include <dt-bindings/clock/exynos5420.h>
 #include <dt-bindings/clock/exynos-audss-clk.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
 	compatible = "samsung,exynos5420", "samsung,exynos5";
@@ -1453,6 +1454,10 @@ &usbdrd3_1 {
 	clock-names = "usbdrd30";
 };
 
+&usbdrd_dwc3_1 {
+	interrupts = <GIC_SPI 73 0>;
+};
+
 &usbdrd_phy1 {
 	clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
 	clock-names = "phy", "ref";

arch/arm/boot/dts/exynos54xx.dtsi

@@ -141,7 +141,6 @@ usbdrd3_1: usb3-1 {
 			usbdrd_dwc3_1: dwc3@12400000 {
 				compatible = "snps,dwc3";
 				reg = <0x12400000 0x10000>;
-				interrupts = <0 73 0>;
 				phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
 				phy-names = "usb2-phy", "usb3-phy";
 			};