[ARM] Fix init section naming

2.5.44 changed .text.init to .init.text (and other similar section
names).  This cset fixes the ARM parts to work with the new names.

arch/arm/kernel/entry-armo.S

@@ -26,6 +26,7 @@
  *  adhering to the above criteria.
  */
 #include <linux/config.h>
+#include <linux/init.h>
 #include "entry-header.S"
 
 		.text
@@ -597,7 +598,7 @@ ENTRY(__switch_to)
  * What we need to put into 0-0x1c are branches to branch to the kernel.
  */
 
-		.section ".text.init",#alloc,#execinstr
+		__INIT
 
 .Ljump_addresses:
 		swi	SYS_ERROR0

arch/arm/kernel/entry-armv.S

@@ -14,6 +14,7 @@
  *  it to save wrong values...  Be aware!
  */
 #include <linux/config.h>
+#include <linux/init.h>
 #include "entry-header.S"
 #include <asm/thread_info.h>
 #include <asm/glue.h>
@@ -1013,7 +1014,7 @@ ENTRY(__switch_to)
 		mcr	p15, 0, r2, c3, c0		@ Set domain register
 		ldmib	r1, {r4 - sl, fp, sp, pc}	@ Load all regs saved previously
 
-		.section ".text.init",#alloc,#execinstr
+		__INIT
 /*
  * Vector stubs.  NOTE that we only align 'vector_IRQ' to a cache line boundary,
  * and we rely on each stub being exactly 48 (1.5 cache lines) in size.  This

arch/arm/kernel/head.S

@@ -11,6 +11,7 @@
  */
 #include <linux/config.h>
 #include <linux/linkage.h>
+#include <linux/init.h>
 
 #include <asm/assembler.h>
 #include <asm/mach-types.h>
@@ -68,7 +69,7 @@
  * crap here - that's what the boot loader (or in extreme, well justified
  * circumstances, zImage) is for.
  */
-	.section ".text.init",#alloc,#execinstr
+	__INIT
 	.type	stext, #function
 ENTRY(stext)
 	mov	r12, r0

arch/arm/mach-arc/head.S

@@ -11,6 +11,7 @@
  */
 #include <linux/config.h>
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/mach-types.h>
 
 		.globl	swapper_pg_dir
@@ -19,7 +20,7 @@
 /*
  * Entry point.
  */
-		.section ".text.init",#alloc,#execinstr
+		__INIT
 ENTRY(stext)
 __entry:	cmp	pc, #0x02000000
 		ldrlt	pc, LC0			@ if 0x01800000, call at 0x02080000

arch/arm/mm/copypage-v3.S

@@ -10,6 +10,7 @@
  *  ASM optimised string functions
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 
@@ -57,7 +58,7 @@ ENTRY(v3_clear_user_page)
 	bne	1b				@ 1
 	ldr	pc, [sp], #4
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 ENTRY(v3_user_fns)
 	.long	v3_clear_user_page

arch/arm/mm/copypage-v4mc.S

@@ -10,6 +10,7 @@
  *  ASM optimised string functions
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 
 	.text
@@ -70,7 +71,7 @@ ENTRY(v4_mc_clear_user_page)
 	bne	1b				@ 1
 	ldr	pc, [sp], #4
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 ENTRY(v4_mc_user_fns)
 	.long	v4_mc_clear_user_page

arch/arm/mm/copypage-v4wb.S

@@ -10,6 +10,7 @@
  *  ASM optimised string functions
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 
 	.text
@@ -69,7 +70,7 @@ ENTRY(v4wb_clear_user_page)
 	mcr	p15, 0, r1, c7, c10, 4		@ 1   drain WB
 	ldr	pc, [sp], #4
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 ENTRY(v4wb_user_fns)
 	.long	v4wb_clear_user_page

arch/arm/mm/copypage-v4wt.S

@@ -13,6 +13,7 @@
  *  the only supported cache operation.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 
 	.text
@@ -63,7 +64,7 @@ ENTRY(v4wt_clear_user_page)
 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache
 	ldr	pc, [sp], #4
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 ENTRY(v4wt_user_fns)
 	.long	v4wt_clear_user_page

arch/arm/mm/copypage-xscale.S

@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 
 /*
@@ -78,7 +79,7 @@ ENTRY(xscale_mc_clear_user_page)
 	bne	1b
 	ldr	pc, [sp], #4
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 ENTRY(xscale_mc_user_fns)
 	.long	xscale_mc_clear_user_page

arch/arm/mm/proc-arm1020.S

@@ -26,6 +26,7 @@
  */
 #include <linux/linkage.h>
 #include <linux/config.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -450,7 +451,7 @@ ENTRY(cpu_arm1020_name)
 	.ascii	"\0"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __arm1020_setup:
 	mov	r0, #0

arch/arm/mm/proc-arm2_3.S

@@ -13,6 +13,7 @@
  *  and memory functions on ARM2, ARM250 and ARM3 processors.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -280,7 +281,7 @@ _arm2_name:	.asciz	"ARM 2"
 _arm250_name:	.asciz	"ARM 250"
 _arm3_name:	.asciz	"ARM 3"
 
-		.section ".text.init", #alloc, #execinstr
+		__INIT
 /*
  * Purpose : Function pointers used to access above functions - all calls
  *	     come through these

arch/arm/mm/proc-arm6_7.S

@@ -11,6 +11,7 @@
  *  functions on the ARM610 & ARM710.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -316,7 +317,7 @@ cpu_arm710_name:
 		.asciz	"ARM 710"
 		.align
 
-		.section ".text.init", #alloc, #execinstr
+		__INIT
 
 __arm6_setup:	mov	r0, #0
 		mcr	p15, 0, r0, c7, c0		@ flush caches on v3

arch/arm/mm/proc-arm720.S

@@ -31,6 +31,7 @@
  *   08-25-2000	DBS	Updated for integration of ARM Ltd version.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -177,7 +178,7 @@ cpu_arm720_name:
 		.asciz	"ARM720T"
 		.align
 
-		.section ".text.init", #alloc, #execinstr
+		__INIT
 
 __arm720_setup:	mov	r0, #0
 		mcr	p15, 0, r0, c7, c7, 0		@ invalidate caches

arch/arm/mm/proc-arm920.S

@@ -26,6 +26,7 @@
  */
 #include <linux/linkage.h>
 #include <linux/config.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -443,7 +444,7 @@ ENTRY(cpu_arm920_name)
 	.ascii	"\0"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __arm920_setup:
 	mov	r0, #0

arch/arm/mm/proc-arm922.S

@@ -27,6 +27,7 @@
  */
 #include <linux/linkage.h>
 #include <linux/config.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -442,7 +443,7 @@ ENTRY(cpu_arm922_name)
 	.ascii	"\0"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __arm922_setup:
 	mov	r0, #0

arch/arm/mm/proc-arm926.S

@@ -26,6 +26,7 @@
  */
 #include <linux/linkage.h>
 #include <linux/config.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -430,7 +431,7 @@ ENTRY(cpu_arm926_name)
 	.ascii	"\0"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __arm926_setup:
 	mov	r0, #0

arch/arm/mm/proc-sa110.S

@@ -18,6 +18,7 @@
  *    Flush the read buffer at context switches
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -484,7 +485,7 @@ cpu_sa1110_name:
 	.asciz	"StrongARM-1110"
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __sa1100_setup:	@ Allow read-buffer operations from userland
 	mcr	p15, 0, r0, c9, c0, 5

arch/arm/mm/proc-xscale.S

@@ -21,6 +21,7 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/constants.h>
 #include <asm/procinfo.h>
@@ -668,7 +669,7 @@ cpu_pxa250_name:
 
 	.align
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 __xscale_setup:
 	mov	r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE

arch/arm/mm/tlb-v3.S

@@ -12,6 +12,7 @@
  * Processors: ARM610, ARM710.
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 #include <asm/tlbflush.h>
 #include "proc-macros.S"
@@ -41,7 +42,7 @@ ENTRY(v3_flush_kern_tlb_range)
 	blo	1b
 	mov	pc, lr
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 	.type	v3_tlb_fns, #object
 ENTRY(v3_tlb_fns)

arch/arm/mm/tlb-v4.S

@@ -13,6 +13,7 @@
  * Processors: ARM720T
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 #include <asm/tlbflush.h>
 #include "proc-macros.S"
@@ -55,7 +56,7 @@ ENTRY(v4_flush_user_tlb_range)
 .globl v4_flush_kern_tlb_range
 .equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 	.type	v4_tlb_fns, #object
 ENTRY(v4_tlb_fns)

arch/arm/mm/tlb-v4wb.S

@@ -13,6 +13,7 @@
  *  Processors: ARM920 ARM922 ARM926 SA110 SA1100 SA1110 XScale
  */
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/constants.h>
 #include <asm/tlbflush.h>
 #include "proc-macros.S"
@@ -110,7 +111,7 @@ ENTRY(v4wbi_flush_kern_tlb_range)
 	blo	1b
 	mov	pc, lr
 
-	.section ".text.init", #alloc, #execinstr
+	__INIT
 
 	.type	v4wb_tlb_fns, #object
 ENTRY(v4wb_tlb_fns)

arch/arm/vmlinux-armo.lds.in

@@ -11,7 +11,7 @@ SECTIONS
 	.init : {			/* Init code and data		*/
 		_stext = .;
 		__init_begin = .;
-			*(.text.init)
+			*(.init.text)
 		__proc_info_begin = .;
 			*(.proc.info)
 		__proc_info_end = .;
@@ -21,10 +21,10 @@ SECTIONS
 		__tagtable_begin = .;
 			*(.taglist)
 		__tagtable_end = .;
-			*(.data.init)
+			*(.init.data)
 		. = ALIGN(16);
 		__setup_start = .;
-			*(.setup.init)
+			*(.init.setup)
 		__setup_end = .;
 		__initcall_start = .;
 			*(.initcall1.init)
@@ -44,8 +44,8 @@ SECTIONS
 	}
 
 	/DISCARD/ : {			/* Exit code and data		*/
-		*(.text.exit)
-		*(.data.exit)
+		*(.exit.text)
+		*(.exit.data)
 		*(.exitcall.exit)
 	}
 

arch/arm/vmlinux-armv.lds.in

@@ -11,7 +11,7 @@ SECTIONS
 	.init : {			/* Init code and data		*/
 		_stext = .;
 		__init_begin = .;
-			*(.text.init)
+			*(.init.text)
 		__proc_info_begin = .;
 			*(.proc.info)
 		__proc_info_end = .;
@@ -21,10 +21,10 @@ SECTIONS
 		__tagtable_begin = .;
 			*(.taglist)
 		__tagtable_end = .;
-			*(.data.init)
+			*(.init.data)
 		. = ALIGN(16);
 		__setup_start = .;
-			*(.setup.init)
+			*(.init.setup)
 		__setup_end = .;
 		__initcall_start = .;
 			*(.initcall1.init)
@@ -40,8 +40,8 @@ SECTIONS
 	}
 
 	/DISCARD/ : {			/* Exit code and data		*/
-		*(.text.exit)
-		*(.data.exit)
+		*(.exit.text)
+		*(.exit.data)
 		*(.exitcall.exit)
 	}