Commit e90f8754 authored by Matthias Kaehlcke's avatar Matthias Kaehlcke Committed by Lee Jones

mfd: ti_am335x_tscadc: Restore clock divider on resume

The ADC clock divider needs to be restored on resume as the register content
is lost when the ADC is powered down
Signed-off-by: default avatarMatthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent 60013b94
......@@ -95,7 +95,7 @@ static int ti_tscadc_probe(struct platform_device *pdev)
const __be32 *cur;
u32 val;
int err, ctrl;
int clk_value, clock_rate;
int clock_rate;
int tsc_wires = 0, adc_channels = 0, total_channels;
int readouts = 0;
......@@ -196,11 +196,11 @@ static int ti_tscadc_probe(struct platform_device *pdev)
}
clock_rate = clk_get_rate(clk);
clk_put(clk);
clk_value = clock_rate / ADC_CLK;
tscadc->clk_div = clock_rate / ADC_CLK;
/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
clk_value = clk_value - 1;
tscadc_writel(tscadc, REG_CLKDIV, clk_value);
tscadc->clk_div--;
tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div);
/* Set the control register bits */
ctrl = CNTRLREG_STEPCONFIGWRT |
......@@ -303,6 +303,8 @@ static int tscadc_resume(struct device *dev)
tscadc_writel(tscadc_dev, REG_CTRL,
(restore | CNTRLREG_TSCSSENB));
tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div);
return 0;
}
......
......@@ -151,6 +151,7 @@ struct ti_tscadc_dev {
struct mfd_cell cells[TSCADC_CELLS];
u32 reg_se_cache;
spinlock_t reg_lock;
unsigned int clk_div;
/* tsc device */
struct titsc *tsc;
......
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