Commit e913d468 authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by John W. Linville

ssb: fix ssb clock rate according to broadcom source

This fix was done according to si_clock_rate function in broadcom siutils.c
Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent f9fc5136
...@@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) ...@@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
switch (plltype) { switch (plltype) {
case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
if (m & SSB_CHIPCO_CLK_T6_MMASK) if (m & SSB_CHIPCO_CLK_T6_MMASK)
return SSB_CHIPCO_CLK_T6_M0; return SSB_CHIPCO_CLK_T6_M1;
return SSB_CHIPCO_CLK_T6_M1; return SSB_CHIPCO_CLK_T6_M0;
case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment