Commit e9db15e3 authored by Denis Carikli's avatar Denis Carikli Committed by Shawn Guo

ARM: i.MX25 clk: Use of_clk_init() for DT case

Replace .init_time() hook with of_clk_init() for DT targets.

Based on:
  d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case
Signed-off-by: default avatarDenis Carikli <denis@eukrea.com>
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 988eb354
......@@ -32,8 +32,6 @@
#include "hardware.h"
#include "mx25.h"
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
#define CCM_MPCTL 0x00
#define CCM_UPCTL 0x04
#define CCM_CCTL 0x08
......@@ -56,7 +54,7 @@
#define CCM_LTR3 0x4c
#define CCM_MCR 0x64
#define ccm(x) (CRM_BASE + (x))
#define ccm(x) (ccm_base + (x))
static struct clk_onecell_data clk_data;
......@@ -91,8 +89,11 @@ enum mx25_clks {
static struct clk *clk[clk_max];
static int __init __mx25_clocks_init(unsigned long osc_rate)
static int __init __mx25_clocks_init(unsigned long osc_rate,
void __iomem *ccm_base)
{
BUG_ON(!ccm_base);
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[osc] = imx_clk_fixed("osc", osc_rate);
clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
......@@ -240,7 +241,11 @@ static int __init __mx25_clocks_init(unsigned long osc_rate)
int __init mx25_clocks_init(void)
{
__mx25_clocks_init(24000000);
void __iomem *ccm;
ccm = ioremap(MX25_CRM_BASE_ADDR, SZ_16K);
__mx25_clocks_init(24000000, ccm);
clk_register_clkdev(clk[gpt1_ipg], "ipg", "imx-gpt.0");
clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
......@@ -308,29 +313,29 @@ int __init mx25_clocks_init(void)
return 0;
}
int __init mx25_clocks_init_dt(void)
static void __init mx25_clocks_init_dt(struct device_node *np)
{
struct device_node *np;
struct device_node *refnp;
unsigned long osc_rate = 24000000;
void __iomem *ccm;
/* retrieve the freqency of fixed clocks from device tree */
for_each_compatible_node(np, NULL, "fixed-clock") {
for_each_compatible_node(refnp, NULL, "fixed-clock") {
u32 rate;
if (of_property_read_u32(np, "clock-frequency", &rate))
if (of_property_read_u32(refnp, "clock-frequency", &rate))
continue;
if (of_device_is_compatible(np, "fsl,imx-osc"))
if (of_device_is_compatible(refnp, "fsl,imx-osc"))
osc_rate = rate;
}
np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");
ccm = of_iomap(np, 0);
__mx25_clocks_init(osc_rate, ccm);
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
__mx25_clocks_init(osc_rate);
mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));
return 0;
}
CLK_OF_DECLARE(imx25_ccm, "fsl,imx25-ccm", mx25_clocks_init_dt);
......@@ -55,7 +55,6 @@ int mx25_clocks_init(void);
int mx27_clocks_init(unsigned long fref);
int mx31_clocks_init(unsigned long fref);
int mx35_clocks_init(void);
int mx25_clocks_init_dt(void);
int mx31_clocks_init_dt(void);
struct platform_device *mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
......
......@@ -29,16 +29,10 @@ static const char * const imx25_dt_board_compat[] __initconst = {
NULL
};
static void __init imx25_timer_init(void)
{
mx25_clocks_init_dt();
}
DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
.map_io = mx25_map_io,
.init_early = imx25_init_early,
.init_irq = mx25_init_irq,
.init_time = imx25_timer_init,
.init_machine = imx25_dt_init,
.dt_compat = imx25_dt_board_compat,
.restart = mxc_restart,
......
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