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Commit ecf89023 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'samsung-dt-5.3' of... 

Merge tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.3

1. Fixes for minor warnings.
2. Enable ADC on Exynos5410 Odroid XU board.

* tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Add ADC node to Exynos5410 and Odroid XU
  ARM: dts: exynos: Raise maximum buck regulator voltages on Arndale Octa
  ARM: dts: exynos: Move CPU OPP tables out of SoC node on Exynos5420
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f8269581 d2cac68e
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Showing with 142 additions and 126 deletions
arch/arm/boot/dts/exynos5410-odroidxu.dts
View file @ ecf89023
......@@ -85,6 +85,11 @@ link0_codec: simple-audio-card,codec {
};
};
&adc {
vdd-supply = <&ldo10_reg>;
status = "okay";
};
&audi2s0 {
status = "okay";
};
......
arch/arm/boot/dts/exynos5410.dtsi
View file @ ecf89023
......@@ -260,6 +260,12 @@ cpu3_thermal: cpu3-thermal {
};
};
&adc {
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
samsung,syscon-phandle = <&pmu_system_controller>;
};
&arm_a15_pmu {
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
status = "okay";
......
arch/arm/boot/dts/exynos5420-arndale-octa.dts
View file @ ecf89023
......@@ -615,48 +615,48 @@ ldo38_reg: LDO38 {
buck1_reg: BUCK1 {
regulator-name = "PVDD_MIF_1V1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
buck3_reg: BUCK3 {
regulator-name = "PVDD_INT_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
};
buck4_reg: BUCK4 {
regulator-name = "PVDD_G3D_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
};
buck5_reg: BUCK5 {
regulator-name = "PVDD_LPDDR3_1V2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1200000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
};
buck6_reg: BUCK6 {
regulator-name = "PVDD_KFC_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
buck7_reg: BUCK7 {
regulator-name = "VIN_LLDO_1V4";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
......
arch/arm/boot/dts/exynos5420.dtsi
View file @ ecf89023
......@@ -42,117 +42,119 @@ aliases {
* by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
*/
soc: soc {
cluster_a15_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <140000>;
};
opp-1700000000 {
opp-hz = /bits/ 64 <1700000000>;
opp-microvolt = <1212500>;
clock-latency-ns = <140000>;
};
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <140000>;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1137500>;
clock-latency-ns = <140000>;
};
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-microvolt = <1112500>;
clock-latency-ns = <140000>;
};
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1062500>;
clock-latency-ns = <140000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1037500>;
clock-latency-ns = <140000>;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <1012500>;
clock-latency-ns = <140000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = < 987500>;
clock-latency-ns = <140000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = < 962500>;
clock-latency-ns = <140000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = < 937500>;
clock-latency-ns = <140000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = < 912500>;
clock-latency-ns = <140000>;
};
cluster_a15_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <140000>;
};
opp-1700000000 {
opp-hz = /bits/ 64 <1700000000>;
opp-microvolt = <1212500>;
clock-latency-ns = <140000>;
};
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <140000>;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1137500>;
clock-latency-ns = <140000>;
};
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-microvolt = <1112500>;
clock-latency-ns = <140000>;
};
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1062500>;
clock-latency-ns = <140000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1037500>;
clock-latency-ns = <140000>;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <1012500>;
clock-latency-ns = <140000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = < 987500>;
clock-latency-ns = <140000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = < 962500>;
clock-latency-ns = <140000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = < 937500>;
clock-latency-ns = <140000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = < 912500>;
clock-latency-ns = <140000>;
};
};
cluster_a7_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1275000>;
clock-latency-ns = <140000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1212500>;
clock-latency-ns = <140000>;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <1162500>;
clock-latency-ns = <140000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1112500>;
clock-latency-ns = <140000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <1062500>;
clock-latency-ns = <140000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <140000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <975000>;
clock-latency-ns = <140000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <937500>;
clock-latency-ns = <140000>;
};
cluster_a7_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1275000>;
clock-latency-ns = <140000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1212500>;
clock-latency-ns = <140000>;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
opp-microvolt = <1162500>;
clock-latency-ns = <140000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1112500>;
clock-latency-ns = <140000>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <1062500>;
clock-latency-ns = <140000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <140000>;
};
opp-700000000 {
opp-hz = /bits/ 64 <700000000>;
opp-microvolt = <975000>;
clock-latency-ns = <140000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <937500>;
clock-latency-ns = <140000>;
};
};
soc: soc {
cci: cci@10d20000 {
compatible = "arm,cci-400";
#address-cells = <1>;
......@@ -548,18 +550,6 @@ dsi@14500000 {
status = "disabled";
};
adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v2";
reg = <0x12D10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};
hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E00000 0x1000>;
......@@ -1363,6 +1353,12 @@ gpu_thermal: gpu-thermal {
};
};
&adc {
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
samsung,syscon-phandle = <&pmu_system_controller>;
};
&dp {
clocks = <&clock CLK_DP1>;
clock-names = "dp";
......
arch/arm/boot/dts/exynos54xx.dtsi
View file @ ecf89023
......@@ -96,6 +96,15 @@ watchdog: watchdog@101d0000 {
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v2";
reg = <0x12d10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
io-channel-ranges;
status = "disabled";
};
/* i2c_0-3 are defined in exynos5.dtsi */
hsi2c_4: i2c@12ca0000 {
compatible = "samsung,exynos5250-hsi2c";
......
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