Commit eec4b140 authored by Joerg Roedel's avatar Joerg Roedel Committed by Avi Kivity

KVM: SVM: Allow EFER.LMSLE to be set with nested svm

This patch enables setting of efer bit 13 which is allowed
in all SVM capable processors. This is necessary for the
SLES11 version of Xen 4.0 to boot with nested svm.
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 3f10c846
...@@ -20,6 +20,7 @@ ...@@ -20,6 +20,7 @@
#define _EFER_LMA 10 /* Long mode active (read-only) */ #define _EFER_LMA 10 /* Long mode active (read-only) */
#define _EFER_NX 11 /* No execute enable */ #define _EFER_NX 11 /* No execute enable */
#define _EFER_SVME 12 /* Enable virtualization */ #define _EFER_SVME 12 /* Enable virtualization */
#define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */
#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */ #define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */
#define EFER_SCE (1<<_EFER_SCE) #define EFER_SCE (1<<_EFER_SCE)
...@@ -27,6 +28,7 @@ ...@@ -27,6 +28,7 @@
#define EFER_LMA (1<<_EFER_LMA) #define EFER_LMA (1<<_EFER_LMA)
#define EFER_NX (1<<_EFER_NX) #define EFER_NX (1<<_EFER_NX)
#define EFER_SVME (1<<_EFER_SVME) #define EFER_SVME (1<<_EFER_SVME)
#define EFER_LMSLE (1<<_EFER_LMSLE)
#define EFER_FFXSR (1<<_EFER_FFXSR) #define EFER_FFXSR (1<<_EFER_FFXSR)
/* Intel MSRs. Some also available on other CPUs */ /* Intel MSRs. Some also available on other CPUs */
......
...@@ -640,7 +640,7 @@ static __init int svm_hardware_setup(void) ...@@ -640,7 +640,7 @@ static __init int svm_hardware_setup(void)
if (nested) { if (nested) {
printk(KERN_INFO "kvm: Nested Virtualization enabled\n"); printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
kvm_enable_efer_bits(EFER_SVME); kvm_enable_efer_bits(EFER_SVME | EFER_LMSLE);
} }
for_each_possible_cpu(cpu) { for_each_possible_cpu(cpu) {
......
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